UPF - universal power format

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Last Updated: Saturday, 10 February 2024 02:53

Published: Friday, 12 October 2018 04:23

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UPF Syntax:

UPF is based on tcl scripting language. UPF commands are defined using syntax that is consistent with Tcl, such that a standard Tcl interpreter can be used to read and process UPF commands. Compliant UPF processors shall use Tcl version 8.4 or above.

UPF supports the specification of attributes, or properties, of objects in a design (eg UPF_clamp_value, etc). Many Liberty attributes are mapped to UPF attributes (i.e lib attr "pg_type" is mapped to UPF attr "UPF_pg_type).

There are 50 or so UPF cmds to specify power intent of design. We will deal with few imp ones. There are many legay or deprecated cmds which should not be used any more.

Power Domains, states and scope:

0. set_scope <inst_name> => This sets current scope of design. Inst name can be scope/design relative hier name.

• slash = / => changes scope to top inst of design
• dot = . => sets scope to current scope
• double dots = ..  => sets scope 1 hier level higher, or parent of current scope.

If design has "top" as top inst, then "mid" and then "bot", then :

• ex: set_scope top => This sets current scope to instance top.
• ex: set_scope top/mid => sets current scope to mid

1. create power domains, port, nets and connect them: These cmds add the pwr signals to design.

A. create_power_domain <PD_NAME> => defines a power domain and the set of instances that are in the extent of the power domain. The scope of this PD is the current scope of design, so scope has to be set beforehand using "set_scope" cmd. options:

• -supply: defines the supply sets (SS) that are used to provide power to instances within the extent of the power domain. The supported supply set handles are primary, default_retention, default_isolation, and extra_supplies_#. Primary is the primary SS for this PD, while extra_supplies_0, extra_supplies_1, etc are the power supplies that are needed for other smaller portions of the PD.
• -elements: If -elements <list> option is used, then only those  inst (and all their descendants) specified in the list are in extent of that PD. option -exclude_elements excludes specified inst from the extent of this PD. By default, everything in scope is in extent of that PD. PD may contain elements from different hier of chip, as A/inst1, B/inst2, C/D/inst3 => so these 3 instances will be in one PD, even though logically they are in 3 different modules.

ex: create_power_domain PD_CHIP -include_scope -supply {primary {SS_VDD1p2}} -supply {extra_supplies {SS_VDDIO}}=> here supply set for primary is set to SS_VDD1p2, and extra_supplies to SS_VDDIO, for this PD. Here, scope is whatever scope was set to.

ex: create_power_domain PD_CHIP -elements {i1 i2 i3} -supply {primary {SS_VDD1p2}} => This includes instances i1, i2 , i3 and all their descendants in the PD_CHIP domain. No other instances from current scope are in this PD.

B. create_supply_port <PORT_NAME> => creates supply port at current scope. If option -domain <PD_NAME> is used, then PORT is created in the scope of speciifed PD.

C. create_supply_net <NET_NAME> => same as above, except that it creates supply net

D. create_supply_set <SET_NAME> => creates supply set. option -function {func_name net_name} defines function (func_name) that a supply net (net_name) provides for this set. Thus it maps each supply net in the set with 1 of 6 functions, These nets comprise the set.

ex: create_supply_set SS_VDD1p2 -function { power VDD1p2 } -function { ground VSS } -function { nwell VDD1p2 } -function { pwell VSS }

We can grab the supply net name from the supply set by using hier with dot as separator, i.e To get net name VDD1p2, we use "SS_VDD1p2.power". Similarly to get net name VSS, we use "SS_VDD1p2.ground".

E. connect_supply_net <NET_NAME> -ports <PORT_NAME> => connects supply net to supply ports

2. power/supply states: specifies various power states possible with various supplies. For ex, VDD supply might have 3 possible voltage values, so we may define 3 power states for it.

- add_power_state <OBJ_NAME> -state <STATE_NAME>  (add_port_state and add_pst_state, along with create_pst are legacy and shouldn't be used) => defines power state of an object which can be a PD, inst, supply net/port/set, etc. Usually power state is defined on supply set. If -supply is specified, the object_name shall be the name of a supply set or a supply set handle. option "-supply_expr {boolean_expr} " specifies a Boolean expression defined in terms of supply ports/nets/set, that evaluates to True when the object is in the state being defined. We can add as many power states as we want to <STATE_NAME> by repeatedly using this cmd.

ex: add_power_state PD_CHIP.primary -state { GO_ST -supply_expr {(power == {FULL_ON 0.8}) && (ground == {FULL_ON 0})} } -state { OFF_ST -supply_expr {power == OFF} } => defines 2 power states = GO_ST and OFF_ST, for PD_CHIP primary supply set which as defined above is SS_VDD1p2

ex: add_power_state SS_VDD1p2 -state V_NOM {-supply_expr {power == `{FULL_ON,0.5,0.6,0.7}}} => creates power state V_NOM for supply set "SS_VDD1p2".

- add_supply-state <OBJ_NAME> -state {<NAME>  <nom_val|off>} => defines a named supply state for a supply object which can be supply port/net/set. If a voltage value is specified, the supply net state is FULL_ON and the voltage value is the specified value; otherwise, if off is specified, the supply net state is OFF.

ex: add_supply_state PD.primary.power -state {active_state 0.90 } -state {off_state off} => defines supply states for condition when active_state is at 0.9V, while off_state is set to "off"

Power management cells: We need Power mgmt cells as power switch, level shifter, isolation, repeater and retention cells. there are set_* cmds to instantiate these in design (except for power switch which has create_* cmd), map_* cmds to map specific lib cells to such cells, and define_* cmds which are basically same as map_* cmds. Not sure why are there map_* and define_* cmds. Power switch, repeater and retention cells have corresponding map_* cmds (there's no map cmd for level shifter and isolation cells), while power switch, level shifter, isolation and retention cells have corresponding define_* cmds (repeater cells don't have a define_* cmd).

3. power switch: create and map/define pwr switch. create cmd used for power switch only (NOT for other cells, as set* cmd is used for those. This is because these are power strategies). Power switch is created just like ports/nets are created.

- create_power_switch <SW_NAME> -domain <PD_NAME> => defines a power switch in the scope of domain specified. This is abstract model of a single switch, impl may use multiple distributed pwr switches. Connections to i/p, o/p, ctl and ack port of switch is done via additional args here or using the map cmd (explained in example below). An on/off state condition is also defined, so that flows can understand how to turn the switch on or off.

ex: create_power_switch sw1 -domain PD_CHIP -control_port {SLEEPN_IN psw1/buf_in/y} -ack_port {SLEEPN_OUT psw1/buf_out/a} -on_state {SW_ON SLEEPN_IN} -off_state {SW_OFF !SLEEPN_IN} -input_supply_port {TVDD VDD_12} -output_supply_port {VDD VVDD_12} => This defines a power switch and connects the ports of power switch to various nets. Here control/ack ports of power switch are named as SLEEPN_IN and SLEEPN_OUT and are connected to some internal net in power switch wrapper. When SLEEPN=1 (i.e SLEEP=0), power switch is on. Vice-versa for when SLEEPN=0. The supply ports are also mapped to i/p supply and switched o/p supply.

- map_power_switch <SW_NAME> -lib_cells {LIB_CELL_LIST} -port_map {port_mappings} => This specifies list of lib cells to which impl of this switch can be mapped to. Lib cells should appear in liberty file with required "power switch" attr or such attr should be added via "define_power_switch_cell" upf cmd.

ex: map_power_switch switch_sw1 -domain test_suite -lib_cells {sw1} -port_map {{inp1 vin1} {inp2 vin2} {outp vout} {c1 ctrl_small} {c2 ctrl_large}}

- define_power_switch_cell -cells {cell_list}  => this cmd identifies the library cells that can be used as power switch in a design. Lots of options available with this cmd. This cmd not needed if "power switch" attr is specified on such cells in liberty files.

4. retention cell: set and map/define retention cells. These reg/flops already exist in RTL design, just that we identify which of these are going to be retention, and what strategy is going to be used.

- set_retention <RET_NAME> -domain <PD_NAME> => specifies retention strategy, and the domain to which it's applied. Other options provide save/restore ports and their active level/edge for save/restore to happen, save/restore condition (logic needed to be connected to generate save/restore condition). option -elements or -exclude_elements can apply this to specific elements instead of applying it to whole PD. -retention_supply provides supply set used to power the retention cells.

- map_retention_cell <RET_NAME> -lib_Cells {LIB_CELL_LIST} -port_map {port_mappings} => This speciifes list of lib cells to which these retention cells can be mapped to. Lib cells should appear in liberty file with required "retention" attr or such attr should be added via "define_retention_cell"

ex: map_retention_cell {my_PDA_ret_strat_1 my_PDA_ret_strat_2} -domain PD_A -elements {foo/U1 foo/U2} -lib_cells {RETFFIMP1 RETFFIMP2}  -port_map { {CP UPF_GENERIC_CLOCK} {D UPF_GENERIC_DATA} {SET UPF_GENERIC_ASYNC_LOAD} {SAVE save_signal} {RESTORE restore_signal} {VDDC primary_supply.power} {VDDRET retention_supply.power} {VSS primary_supply.ground} }

- define_retention_cell -cells {cell_list}  => this cmd identifies the library cells that can be used for retention in a design. Lots of options available with this cmd. This cmd not needed if "retention" attr is specified on such cells in liberty files.

5. repeater cell: set and map repeater cells. map cmd for repeater cells doesn't have an equivalent define_* cmd.

- set_repeater <REP_NAME> -domain <PD_NAME> -applies_to <Inputs|outputs|both> -repeater_supply <SUPPLY_SET> => specifies repeater strategy, and the domain to which it's applied. supply_set that powers this buffer is specified.

- map_repeater_cell <REP_NAME>  -domain <PD_NAME> -lib_cells {LIB_CELL_LIST} => This speciifes list of lib cells to which these repeater cells can be mapped to. NOTE: there is no "repeater" attr needed on lib cells or "define repeater cells" upf cmd, as these are regular buffer cells.

ex: map_repeater_cell my_rep1_pd1 -domain PD1 -elements { clk1 rst1 clkout1 rstout1 } -lib_cells { aon_clk_bufx2 }

6. level shifter cell: set and define level shifter strategy. It's applied at the domain boundary, as required to correct for voltage differences between driving and receiving supplies of a port. There's no map cmd for level shifter in UPF IEEE doc, though it's used as valid UPF cmd everywhere.

- set_level_shifter <LVL_NAME> -domain <PD_NAME> -applies_to <Inputs|outputs|both> -rule <low_to_high|high_to_low|both> -input_supply <IN_SUPPLY_SET> -output_supply <OUT_SUPPLY_SET> => defines level shifting strategy for ports on i/f of specified PD. port_dirn to which this applies can be specified as i/p ports, o/p ports or both (by default, strategy applied to all ports). Rule specifies if level shifter strategy should be applied only to ports needing level shifting in one dirn (default is to apply it to ports needing level shifting in any dir, i.e high to low or low to high). option -no_shift can be used to not apply level shifter on specified ports.

ex: set_level_shifter DFT_input_ls -domain PD_DFT -applies_to inputs -rule both -location parent => defines Level shifter on all i/p ports of PD_DFT power domain.

ex: set_level_shifter DFT_no_ls -domain PD_DFT -no_shift -elements {mux0/out1 {mux2/In[*]} mux3/in3} => This cmd specifies no level shifter on these ports. So, all i/p ports in above cmd will have level shifter, except for ports specified here.

- define_level_shifter_cell -cells {cell_list} -enable <EN_PIN> -direction <low_to_high|high_to_low|both> => this cmd identifies the library cells to use as level-shifter cells. This cmd replaces "map level shifter cells", as all lib cels defined here can be mapped to level shifter strategy defined. 

7. Isolation cell: set and define isolation strategy.Just like level shifters, it's applied to ports at the domain boundary, so that correct electrical and logical functionality is maintained when domains are in different power states. Again, there's no map cmd for isolation cells in UPF IEEE doc, 

- set_isolation <ISO_NAME> -domain <PD_NAME> -applies_to <Inputs|outputs|both> -clamp_value <0|1|Z||latch|value> -isolation_signal {iso_ctl_signal} -isolation_sense <high|low> -isolation_supply <supply_set_list>=> specifies isolation strategy, and the domain to which it's applied. Isolation ctl signal of cell, as well as the active level of ctl signal is specified. We can also specify the Supply set for isolation cell.

ex: set_isolation PD_efuse_in_iso -domain PD_EFUSE -applies_to inputs -clamp_value 0 -isolation_signal pgctl_clamp -isolation_sense high -isolation_supply SS_VDD_1 

- define_isolation_cell -cells {cell_list} -enable <EN_PIN> -clamp_cell <high|low> => this cmd identifies the library cells that can be used for isolation in a design. This cmd replaces "map iso cells", as all lib cels defined here can be mapped to iso strategy defined. Iso cells can be of 2 types => clamp type (clamps o/p to high or low when EN_PIN is active) or non-clamp type (cell function determines cell o/p).

ex: define_isolation_cell -cells iso_cell1 -power VDD -ground GVSS -enable iso_en

8. Port attributes: specifies info associated with ports. These port attributes identifies port's related supplies, and aid in isolation and level shifting insertion.

- set_port_attributes -ports {port list} -clamp_value <0|1|Z|value> -driver_supply {driver supply set} -receiver supply {receiver supply set} => clamp_vale specifies the clamp value to be used if an isolation strategy is applied to the port. Driver_supply is used for an o/p port to specify the driver supply of logic driving the o/p port. Similarly for i/p port, we have receiver supply.

ex: set_port_attributes -ports {port1 port2[*]} -driver_supply SS_VDD12 -receiver supply SS_VDD12 => Here driver and receiver supply for all these ports are set to same supply voltage, implying all ports of current instance.

UPF cmd file Example: (ex in http://rd.springer.com/chapter/10.1007/978-1-4614-4271-4_8/fulltext.html)

In the example above, there are 3 power supplies and 4 power domains defined.

3 pwr supplies => (PVDDdsp=1.1V_0.9V, PVDD1p0=1.0V, PVDD0p9=0.9V), but 4 pwr domains, since PD_COP has a switch to connect to 1.0V spply
4 pwr domains =>

• PD_MYCHIP=1V,
• PD_CPU=0.9v (both always ON)
• PD_COP=1V (from PD_MYCHIP, but can be shutdown using a switch)
• PD_DSP=1.1V or 0.9V

We can define various power modes (basically 4 power modes, where PD_COP may be ON or OFF, and PD_DSP may be 1.1V or 0.9V), and other 2 PD are always ON.

There is a power ctl in PD_MYCHIP domain which controls switch, drives isolation and state retention signals to PD_COP.

mychip.upf:
------
# Set scope to top-level:
set scope

# Declare power domains: (create for all 4 PD)
create_power_domain PD_MYCHIP - include_scope => creates power domains
create_power_domain PD_CPU - elements {U_CPU} => and so on for other 2

# Create power nets at top : (similarly do for other 3 PD => PD_CPU and PD_DSP have only 2 supply nets, one of VDD* and GND, PD_COP has 3 supply nets: VDD1p0, VDD1p0_SW and GND. VDD1p0 is needed since it has retention flops which are always ON)
create_supply_net VDD1p0 - domain PD_MYCHIP - reuse => nets can be any name. supply_net is needed to connect supply ports
create_supply_net VDDdsp - domain PD_MYCHIP - reuse
create_supply_net VDD0p9 - domain PD_MYCHIP - reuse
create_supply_net GND    - domain PD_MYCHIP - reuse

# Create the power ports at top:(similarly do for other 3 PD, all of which have 2 ports). For each PD, supply and gnd port must be specified
create_supply_port PVDD1p0 - domain PD_MYCHIP => port names have to be top level port names
create_supply_port PVDD0p9 - domain PD_MYCHIP
create_supply_port PVDDdsp - domain PD_MYCHIP
create_supply_port PGND - domain PD_MYCHIP

#Connect top power ports and nets: => all ports connected to internal nets
connect_supply_net VDD1p0 - ports PVDD1p0 => this connects the supply ports created
connect_supply_net VDD0p9 - ports PVDD0p9
connect_supply_net VDDdsp - ports PVDDdsp
connect_supply_net GND - ports PGND

#connect top to PD_CPU (connects each lower level module port to these nets) => similarly for other 2 PD
connect_supply_net VDD0p9 - ports {U_CPU/PDCPU_VDD0p9}
connect_supply_net GND - ports {U_CPU/PDCPU_GND}

# Connect inside PD_CPU: => similarly for other 2 PD
connect_supply_net VDD0p9 - ports PDCPU_VDD0p9 - domain PD_CPU
connect_supply_net GND - ports PDCPU_GND - domain PD_CPU

# Specify primary power nets:  It specifies one primary power and ground connection for every power domain.
set_domain_supply_net PD_MYCHIP - primary_power_net VDD1p0 - primary_ground_net GND
set_domain_supply_net PD_CPU - primary_power_net VDD0p9 - primary_ground_net GND
set_domain_supply_net PD_DSP - primary_power_net VDDdsp - primary_ground_net GND
set_domain_supply_net PD_COP - primary_power_net VDD1p0_SW - primary_ground_net GND

#####
#Define isolation strategy and control for PD_COP:
set_isolation PD_COP_ISO \
- domain PD_COP \
- isolation_power_net VDD1p0 \ => supply nets for isolation logic
- isolation_ground_net GND \
- applies_to outputs \ => isolation only applies to output ports of this PD
- clamp_value 0 => specifies value to which iso i/p or o/p are clamped. Here it's iso low

set_isolation_control PD_COP_ISO \ => every set_isolation cmd should have corresponding set_isolation_control
- domain PD_COP \
- isolation_signal U_PC/ISE \ => This can only be a net (no port or pin)
- isolation_sense low \
- location self => self means iso cell is placed within current hier, while "parent" implies it's placed in parent module.

#####
# Define level shifter strategy and control for PD_CPU: (similarly for PD_DSP) => needed only when voltage levels differ
set_level_shifter FROM_PD_CPU_LST \
- domain PD_CPU \
- applies_to outputs \
- rule low_to_high \
- location parent

set_level_shifter TO_PD_CPU_LST \
- domain PD_CPU \
- applies_to inputs \
- rule high_to_low \
- location self

# Declare the switches for PD_COP:
create_power_switch PD_COP_SW \
- domain PD_COP \
- input_supply_port {VDDG VDD1p0} \ => 1st arg is port name, 2nd arg is net name connecting to it.
- output_supply_port {VDD VDD1p0_SW} \
- control_port {SLEEP U_PC/PSE} \
- ack_port {SLEEPOUT U_PC/PSE_ACK} \ => ACK o/p port if present
- ack_delay {SLEEPOUT 10} \ => delay from CTRL i/p port to ACK port
- on_state {SW_on VDDG !SLEEP} \ => SW_on state is defined as when SLEEP port is low
- off_state {SW_off SLEEP} => SW_off state is defined as when SLEEP port is high

# Specify the switch type: This command specifies which cell to use from a technology library for a power switch.
map_power_switch PF_COP_SW \
- domain PD_COP \
- lib_cells HEADBUF_T50

# Specify isolation cell type:
map_isolation_cell PD_COP_ISO \
- domain PD_COP \
- lib_cells {O2ISO_T50 A2ISO_T50}

##########
# Specify retention strategy: (i.e which reg in that PD are to be implemented as ret reg)
set_retention PD_COP_RET \
- domain PD_COP \
- retention_power_net VDD1p0 \ => ret pwr/gnd net are connected to save/restore logic and shadow regs.
- retention_ground_net GND \
- elements {U_COP/reg1 U_COP/pc U_COP/int_state} => All reg here are given ret capability. If no elements specified then element list used to define PD is used.

set_retention_control PD_COP_RET \ => each ret strategy has corresponding ret control.
- domain PD_COP \
- save_signal {U_PC/SRE high} \ => specifies net used to save data in shadow reg, and logic state of save signal that causes this to happen
- restore_signal {U_PC/SRE low} => same signal used for restore signal

map_retention cell MULT_RET \
-domain PD_COP \
-lib_cells RSDFF_X40

#########
# Add port state:
add_port_state PVDD1p0 -state {S1p0 1.0}
add_port_state PVDD0p9 -state {S0p9 0.9}
add_port_state PVDDdsp -state {SH1p1 1.1} -state {SL1p1 0.9}
add_port_state PGND -state {default 0}
add_port_state PD_COP_SW/VDD -state {SW_on 1.0} -state {SW_off off}

# Create power states and state table:
create_pst MYCHIP_pst - supplies \
{VDD1p0 VDD0p9 VDDdsp PD_COP_SW/VDD}

add_pst_state PM1 - pst MYCHIP_pst - state \
{S1p0 S0p9 SH1p1 SW_on}

add_pst_state PM2 - pst MYCHIP_pst - state \
{S1p0 S0p9 SH1p1 SW_off}

add_pst_state PM3 - pst MYCHIP_pst - state \
{S1p0 S0p9 SL1p1 SW_on}

add_pst_state PM4 - pst MYCHIP_pst - state \
{S1p0 S0p9 SL1p1 SW_off}

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