VCLP - VC Low Power

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Last Updated: Wednesday, 29 June 2022 01:11
Published: Tuesday, 10 May 2022 20:26
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VCLP:

VC is Verification compiler platform from Synopsys. It is a platform that has a suite of verification tools that can interoperate with each other. VCLP is a tool from VC that verifies designs that use voltage control based techniques for pwr mgmt. It's a multi-voltage, static low power rule checker. IT verifies the power intent of design captured in IEEE 1801 UPF, and later verifies the implemented power intent in netlist.

These are the checks done by VCLP:

  • Power Intent Consistency Checks =>Performs syntax and semantic checks on the UPF that help validate the consistency of the UPF before starting with the implementation. It's done at RTL level.
  • Signal Corruption Checks => Detects the violating power architecture at the gate-level netlist.
  • Structural Checks => Validates insertion and connection of special cells used in low power design such as isolation cells, power switches, level shifters, retention registers, and always-on cells through out the
    implementation flow.
  • Power and Ground (PG) Checks => Check the PG consistency against the UPF specification for power network routing on physical netlists.
  • Functional Checks => Validates the correct functionality of isolation cells and power switches.

 

VCLP flow:

Bringing up VC Static Shell (vcst in short):

Add path to vc_static_shell installation area to your $PATH var (or provide the full path). Path is usually something like /tools/synopsys/vcst/bin/vc_static_shell
% /tools/synopsys/vcst/bin/vc_static_shell => This brings up vc_static_shell (or just type vc_static_shell if path is already added to your env var $PATH)

vc_static_shell -help => shows all options available with vc_static_shell

vc_static_shell -gui -output_log_file vclp.log -no_color -full64 => -gui brings up the gui instead of cmd line. console output is captured in given log file by using option -output_log_file (or in short, use -o). -no_color starts tool in non-color mode. -full64 or -mode64 starts tool in 64 bit mode (-mode32 starts tool in 32bit mode)

2 ways to run vc_static_shell:

  • batch mode: Here, we specify the script to run, and vc_static_shell runs the tcl script and quits the shell on completion. cmd: vc_static_shell -f my_vcst.tcl -batch
  • Interactive mode: Here, we run in interactive mode, so the shell is brought up, where we can run any cmds we like. cmd: vc_static_shell -f my_vcst.tcl 

vc_static_shell -session my_path/my_session <other_cmds> => Once vclp is run, it creates a default session named "vcst" in dir called "vcst_rtdb" (vcst_rtdb/vcst). To change this default, we provide option "-session". Here, in current dir/my_path, a dir named "my_session_rtdb" is created instead of vcst_rtdb", but session name is still vcst (my_path/my_session_rtdb/vcst). To change session name, we have to fork the existing session and save the forked session with a new name by using cmd "save_session my_saved_session" from within vcst cmd shell, before exiting. Then next time, we can use that saved session to restore.

 Setup file:

Similar to other synopsys tools, we have a setup file called .synopsys_vcst.setup that is used the env for VCLP runs. It may be put in installation dir, home dir or run dir or in all 3 places. Priority is based on this order hwere run dir has highest precedence.

 

3 levels of Low Power checks:

  • RTL level: Here VCLP checks for UPF consistency and signal corruption checks. UPF checks ensure that UPF is clean, and design conforms to all iso/levl shifter rules for all power modes.
    • Here we use VCLP cmd: check_lp -stage upf
  • Netlist level (synthesized design): Here VCLP checks for signal corruption, as well as structural and functional checks. Design instances need to be consistent with UPF, as well as the design is both structurally and functionally correct.
    • Here we use VCLP cmd: check_lp -stage design
  • Power ground connected netlist: Here VCLP checks for power ground pin connectivity in post layout design to be consistent with UPF.
    • Here we use VCLP cmd: check_lp -stage pg

Checks to enable/disable and their severity:

VC LP provides a large number of low power checks. All these checks have a message tags and a predefined reporting format. Based on collective user feedback, by default, VC LP has certain checks enabled and
certain checks disabled. Also, the severity is predefined for each tag of a violation.
VC LP provides the flexibility for you to pick and choose which checks are relevant for your design. You can change the default enable/disable status of check and also change the severity of a check using the configure_lp_tag cmd.

ex: configure_lp_tag -tag ISO_INST_MISSING -severity warning
ex: configure_lp_tag -disable -tag RET_INST_MISSING -disable -goal g1

signoff check:

configure_lp_electrical => This cmd is used to check a limited number of checks during final signoff. We are not looking for UPF correctness at signoff (since that should be checked much earlier in deesign process and already fixed by now), but rather at electrical correctness.  We run this cmd, then run check_lp with any option above, and then run report_lp. There are 40-50 signoff_tags (like ISO_INST_MISSING, LS_INST_INCORRECT, PG_PIN_UNCONN etc) included in configure_lp_electrical.

Inputs to VCLP:

  • RTL(verilog, VHDL, SV), netlist or post layout netlist
  • Liberty files (.lib or .db) for resolving, elaborating the design, recognizing special cells and annotating power connections. Liberty files needed for RTL designs only if RTL has pre-instantiated LP cells as ISO, LS, macro, pads, etc. For netlists, liberty files are necessary. Liberty files need to be low pwr ready, that is, they have pg pins defined and have all low power specific attributes as relevant.
  • power intent specified in UPF file

Output from VCLP:

  • Log file: Log of what ran
  • Report file: error and warnings report for all violations related to low power static rule checks

cmds:

1. read design

read_file => Read in design source files, and link design in memory.

2. read pwr intent:

read_upf =>