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Published: Monday, 03 October 2022 22:56
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JTAG:

If you've ever been involved in debug of a chip, you must have heard of JTAG. in 1980's, boundary scan was developed along with Test Access Port (TAP) to get access to internals of the chip using just few test pins on the chip. This scheme was standardized in IEEE 1149.1, which came to be known as JTAG. JTAG or Joint Test Action Group is the name of the group which developed it, but the term JTAG was given to this std too.  Here are few links to JTAG intro:

Introduction to JTAG and TAP: https://www.allaboutcircuits.com/technical-articles/introduction-to-jtag-test-access-port-tap/

JTAG connectors and i/f: https://www.allaboutcircuits.com/technical-articles/jtag-connectors-and-interfaces/

 

All JTAG compliant devices have these blocks:

  1. Test Access Port (TAP): This is additional pieceof logic that is added on the chip. It has 4 or 5 standard pins thru which we get access to data inside the chip, as well as drive data to write into the chip to make it perform some action. We'll have a separate section on TAP. Here's some intro: https://www.allaboutcircuits.com/technical-articles/jtag-test-access-port-tap-state-machine/
  2. Boundary Scan Registers (BSR): The std allows for implementation of Boujndary scan. Recall that chips now have 1000's of pins on the package, and it may not be functionally possible to drive all the pins of the chip to desired values. Boundary scan std solves this issue. In testmode, it allows user data to be driven on these IO pins. That way we can control all values on IO i/f of chip. This is very helpful in debug of other chips connected to this chip. We can also read values that are driven on input pins of our chip.

Together TAP and BSR constitute JTAG std.

SWD:

ARM's Serial Wire Debug (SWD) is an extension of JTAG developed by ARM Company. This is brief intro about ARM's SWD.

ARM SWD: https://www.allaboutcircuits.com/technical-articles/jtag-implementation-arm-core-devices

 

 

Interface Timing:

Both Jtag and SWD i/f have 1 common timing protocol they adhere to => Data is always captured (by the slave or target) on rising edge of clock. This means that Data should be driven by the driver (master or host) on the falling edge of clock, so that we have 1/2 cycle setup and 1/2 cycle hold. However, this is not compulsory. Master can drive data on rising edge of clk and slave can still capture the data on next rising edge of clk, iving a full 1 cycle setup. But in this case, the hold time is 0 cycle, which may be difficult to meet across all corners.

JTAG Timing diagram:

 

ARM's SWD Timing diagram:

ARM link => https://developer.arm.com/documentation/dui0517/a/serial-wire-debug/swd-timing-requirements?lang=en

 

 

 

 

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Published: Monday, 03 October 2022 15:51
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Oscilloscope:

Oscilloscopes are the most used piece of hardware by electrical engineers. Whenever you are working on real chip, and need to debug it, oscilloscope is your first gadget. They allow you to observe signals on various pins of the chip. Oscilloscopes allow you to observe analog signals, but digital signals can be observed as well. Oscilloscopes are very expensive costing 1000's of dollars. The price of oscilloscope is highly dependent on the Bandwidth of the Oscilloscope. Most cheaper ones on ebay selling for < $50 are digital and can sample only 1 Million samples per second (BW is ~ 100 KHz). Ones selling for > $200 have sample rates of 1 gig samples per second (BW is ~100 MHz).

Best place to buy an oscilloscope is from a local education institute. They usually clean their electronics lab every few years, and give them away for almost free. Other good place is to buy a used one for ebay. One such oscilloscope selling for $200 here:

Tektronix TDS 210 Oscilloscope: https://www.ebay.com/itm/314109595520 => selling for $200 with BW=60MHz. Usually sufficient for home made electronics.

Siglent 100MHz Oscillocope:  https://slickdeals.net/f/16074640-siglent-technologies-sds1104x-e-100mhz-digital-oscilloscope-4-channels-standard-decoder-grey-399-10 => An even better one for $400 (see comments for a youtube link for all cool things you can do)

 

Building Oscilloscope:

Best way to learn about anything is to build it yourself. Here's a nice tutorial on how to build your own oscilloscope.

https://picaxe.com/docs/osc001_design.pdf

I've a local copy of it here: oscilloscope_diy_design.pdf

I haven't built it myself. Will try it someday.

 

 

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Published: Thursday, 29 September 2022 23:46
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Debug Hardware

There are lots of debug hardware to debug digital and anlog chips. Two of the popular ones are:

  1. Oscilloscope
  2. Logic Analyzers

We'll look at these in the following sections.

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Published: Thursday, 29 September 2022 22:55
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Logic Analyzer:

I've included this since Logic analyzers and Oscilloscope are two very important equipment used to debug signals on a chip. Here's brief intro:

https://www.baldengineer.com/logic-analyzer-tutorial-introduction.html

In short, Logic analyzers look at a digital bus (multiple bits of data), all bits, at same time and samples them continuously for specified time. It's different from oscilloscope in teh sense that oscilloscope looks at the waveform of signal, and plots it in analog domain (in reality, it's digital as there's a analog to digital converter in digital oscilloscope. But the granularity is so fine, that it looks like an analog signal). But logic analyzer plots digital signals ((0 or 1 only), and shows the waveform on the analyzer. Logic means digital, so logic analyzer is analyzing digital signals.

Digital signals from inside the chip are brought on to some GPIO (General purpose IO) pins on the chip, and we connect these GPIO pins to the analyzer. We also have a trigger signal, that we can set to start the process of capturing these digital signals. These digital signals need not be from a bus, they can be unrelated to each other. Logic analyzers allow us to see all these signals at same time, and their timing relationship with each other. We are limited by the number of GPIO pins we have available on chip, which could be used for driving these logic signals. These Logic analyzers are able to sample in Megahertz rate, i.e 100 Million samples per second is now common.

On Chip Logic Analyzer (OCLA):

These are an extension of Logic analyzers where the whole logic analyzer sits on chip, instead of being outside off chip. Nowadays chips are complex and have very few GPIO pins in comparison to the number of signals that we may want to observe. Also, chips are running internally in 100's of MHz speed, and our off chip analyzer may not be able to capture signals that fast. To resolve all of these issues, we build OCLA as follows:

  1. Sets of signals that we want sampled are passed on to a memory on chip (along with some glue logic).
  2. There's a trigger signal that can be set based on desired conditions. Whenever the trigger signal is set, these probe signals start getting sampled and written to a memory on chip. These get written to the memory until that memory is full or some other pre set condition is met. The number of signals and the time period over which these are captured is limited by the memory size. So, trace of 128 samples for 64 bits of signals would require a memory size of 128*64=1KB of memory.
  3. We can get the contents of memory out using JTAG pins (via TAP on the chip). This doesn't disrupt the normal operation of the chip.
  4. We still need an offchip debugger (basically a software) that has gui interface that allows you to configure the ocla. We choose signals we want traced, setup a trigger and start the tracer. Once the trace is complete, the software will extract data from memory on chip (usually using JTAG pins) and generate a vcd file (vcd file is waveform viewer file, see in digital section). This vcd file can be loaded on to any waveform viewer to see the waveform. This vcd has the exact trace that the hardware was seeing, so it's exact replica of what was happening on the chip.

OCLA is very popular on modern SOC chips which have billions of transistors on them, and bugs are not easy to trace. Multiple OCLA on chip allow all kind of signals to be traced, without interrupting the device. Thus we can narrow down the location of bug, by viewing these waveforms and comparing them to a simulation run.

Here's a little intro on OCLA: https://www.electronicproducts.com/on-chip-logic-analysis/

OCLA interface:

 

 

 

can drive them on whichever GPIO pins they were assigned to.

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Published: Monday, 19 September 2022 23:07
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Health Tips:

These are few health tips that I colected from my personal experience as well as from random places.

Drinking warm water early morning everyday:

You should try to drink 1 liter of water (about 4 glasses) every morning after you wake up, and before you go to use the restroom. This seems to really help with your digestive system and any constipation issues. Also drinking water hydrates your body and cleanses your body by forcing you to pee multiple times in the morning.

On top of drinking water, seems like drinking warm water is even more beneficial. It helps with cold/cough for sure, where many times I've noticed that cold/cough seem to be at bay by just starting to drink warm water. I heat water in microwave for 30 seconds, and it seems to be warm enough. Don't make it hot as that's not only difficult to drink, but may also cause burns in tongue or throat.

For full day, you should try to drink at least 2 litres of water and at most 4 litres of water. That's a lot, but it rally helps your body look young. Link:

Here's a link explaining some of the benefits: https://www.msn.com/en-us/health/other/10-super-surprising-benefits-of-drinking-hot-water/ar-AAUNk0l

 

Waking up at 3am with negative thoughts:

I've experienced this myself, and heard from my dad too. Then I saw this article which tries to explain the sce=ience behind it => https://getpocket.com/explore/item/why-do-we-wake-around-3am-and-dwell-on-our-fears-and-shortcomings

 

 

 

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