Display Port

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Last Updated: Saturday, 20 August 2022 07:14
Published: Friday, 19 August 2022 16:04
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Display Port (DP):

Display port is a very popular display interface. It's primarily used to connect a video source (i.e a cpu or graphics card) to a display device such as a monitor. You will see these interface on high end desktop, laptop or gaming consoles, where you can connect your monitors to these. DP is also used to carry other signals besides video as audio, other data, etc. DP was designed to replace VGA and DVI which are older tech. HDMI is a similar display interface as DP, which is equally popular, and is more commonly found in mostly non gaming electronics as or PC, TV, etc. We'll talk about HDMI in a separate section.

Link: https://en.wikipedia.org/wiki/DisplayPort

Generations of DP:

DP is standardized by VESA (Video Electronics Standard Association). There are various generations of DP starting with version 1.0 introduced in 2006.

  • DP 1.0: Introduced in 2006. It had very low data transmission rate of 1.62Gbit/s per lane.
  • DP 1.1- DP 1.4: Then came version 1.1, 1.2, 1.3 and 1.4 from 2007 to 2018.These increased transmission rates varying from 2.20 Gbit/s per lane to 8.1Gbit/s bandwidth per lane.
  • DP 2.0: Latest version is DP 2.0 introduced in 2022, which provided huge leap in transmission rates. DP1.4 and prior used 8B/10B encoding, while DP2.0 uses 128B/132B encoding, which has better efficiency.

DP interface:

Below is the picture of DP. DP has 20 pins. We'll look at the 20 pins below. There are 2 sets of data transmission pins (15 pins in total), and other misc pins:

  1. Main Link (ML) = 12 pins: ML is used for transmission of video and audio. The video signal path can range from six to sixteen bits per color channel, and the audio path can have up to eight channels of 24-bit, 192 kHz uncompressed PCM audio. The main link consists of a number of unidirectional serial data channels from source to display which operate concurrently, called lanes. There are 4 lanes ML0 to ML3. Each lane has + (positive) and - (negative) signals, known as differential signaling, tranmistted across 4 dedicated sets of twisted-pair wires.. Diff signals allow for better noise immunity. The other 4 pins are gnd pins. These gnd pins go around as shield with each twisted pair. There gnd pins provide isolation between lanes and hence reduce interference. This is self clocking as clk is embedded in data signal. We use 8B/10B or 128B/132B data encoding system.  The following transmission modes are defined. The mode chosen is negotiated by the source and sink device when a connection is made, through a process called Link Training. This process determines the maximum possible speed of the connection. If the higher bit rate can't be supported, then the device detects this and switches to a lower bit rate mode.
    1. RBR (Reduced Bit Rate): 1.62 Gbit/s bandwidth per lane (162 MHz link symbol rate). Total BW for 4 lanes is 4*1.62=6.48Gbit/s.
    2. HBR (High Bit Rate): 2.70 Gbit/s bandwidth per lane (270 MHz link symbol rate). HBR2 and HB3 were introduced in DP1.2 and DP1.3, which provided 5.40 Gbit/s and 8.1Gbit/s bandwidth per lane.
    3. UHBR (Ultra High Bit Rate): This was introduced in DP2.0, and has different versions. UHBR 10 has 10 Gbit/s bandwidth per lane, while UHBR20 has 20 Gbit/s bandwidth per lane.
  2. Auxiliary channel (AUX) = 3 pins: The DP AUX channel is a half duplex (bidirectional) data channel used for miscellaneous additional data beyond video and audio (i.e device management and device control data for the Main Link), such as EDID or CEC commands.  This bidirectional data channel is required, since control communication needs to happen both ways for handshake, ack, etc. AUX signals are transmitted as diff signals (+ and - similar to ML) across a dedicated set of twisted-pair wires, with 3rd gnd pin providing a shield . The data rate of these AUX channels is pretty low at 1MBit/sec.
  3. DP_PWR_PIN, Return_for_power = 2 pins: Pin 20 is DP_PWR_PIN which is supposed to provide 3.3V (+/- 10% tolerance) power supply at max current of 0.5A (power=3V*0.5=1.5W). Pin 19 is Return_for_power which provides the return path for the power supply provided on pin 20. This power pin is provided so that separate power supply is not required for consuming devices and they can just be powered using this pin. However, since both src side and sink side have this pwr pin supplying power, connecting them may cause short circuit (since voltage on 2 pins may not be exactly the same at 3.3V). so, it's recommended in DP 1.1 and beyond specs to leave this power pin unconnected.
  4. Hot Plug Detect (HPD): This is pin 18 and is used to detect the presence of anything connected to this DP interface. 
  5. CONFIG1, CONFIG2: These are pins 13, 14 and are connected to gnd (as per DP spec). Not sure why?

Resolution and Refresh limits for DP: The resolution and refresh rate of display with DP protocol depends on the bit rate. RBR with it's lower bit rate can support 1080P @80Hz, while UHBR 20 can support 8K @80Hz. 

DP over USB-C: In 2014, VESA published the DisplayPort Alternate Mode on USB Type-C Connector Standard, a specification on how to send DisplayPort signals over the newly released USB-C connector. One, two or all four of the differential pairs that USB uses for the SuperSpeed bus can be configured dynamically to be used for DisplayPort lanes. The DisplayPort AUX channel is also supported over the two sideband signals over the same connection. Look in USB section for more details.