USB = Universal Serial Bus

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Last Updated: Wednesday, 10 May 2023 15:31

Published: Thursday, 31 October 2019 17:37

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USB: widely used communication protocol. At it's core, it has a pair of differential pins for data xfer. There is no clk pin, as clk is embedded within data, and is recovered from there. USB is a confusing protocol with many different terminology and loosely used terms. It defines 2 kinds of spec. One relates to the data communication protocol over wires (i.e USB 1.0, etc), while other refers to the physical connectors (i.e Type C, etc). On top of data communication protocol, USB also defines power delivery communication protocol (PD 1.0, etc). Not all data/power communication protocol are valid over all connector types. On many occasions, the 3 specs are mixed together. We'll talk about these separately.

History:

• USB 1.0: Very earliest usb, came out in 1996. It is called LS (low speed) USB. It has speeds of 1.5Mbits/sec (or equivalently a clk with freq of 1.5MHz). It's power src is 5V @ 100mA (=0.5W max power)
  • USB 1.1: incremental update to USB 1.0, came out in 1998. It is called FS (full speed) USB. It has speed of 12Mbits/sec.
• USB 2.0: next gen of USB, came out in 2001. It is called HS (high speed), and has speeds of 480Mbits/sec (gigantic leap). Power src was also improved to allow more power to be delivered at 2.5W = 5V @ 500mA.
• Upto USB 2.0, usb connectors were identical. They were either Type A connectors, or Type B connectors. They had 4 pins = VBUS, GND, D+, D-. The data pins D+/D- were used for both transmitting and receiving data, so they were half duplex pins.
• USB 3.0: 3rd gen of USB, came out in 2008. It is called SS (super speed) USB. It had 10X higher speeds of 5Gbits/sec (equiv to 5GHz clk freq). However, such high clk freq of 5GHz was not neededto provide 5GBits/sec Bandwidth. Instead USB 3.0 std added new wiring for full duplex operation, i.e new pins do not need to be bidirectional, one pair was receiver, while other pair was transmitter. To have backward compatibility, D+/D- pins were left untouched as bidirectional. New TX+/TX- and RX+/RX- pins were added. New USB 3.x connectors were made, which were still backward compatible with USB connectors from prev gen. New USB 3.x connectors just added new superspeed pins for faster data transfer, either by changing shapes of type A, type B connectors, or getting new pins in b/w the existing pins w/o chnaging shapes. All std connectors as type A, type B in all forms were supported. It supported 8B/10B encoding. There were new type of connectors called Type-C (explained below) which exclusively carried USB 3.2 signals.
  
  • USB 3.1: incremental update to USB 3.0, came out in 2013. It is called SS+ (super speed plus) USB. It doubled the speeds to 10Gbits/sec. It was called USB 3.1 and replaced the older USB 3.0 std. However, to distinguish b/w the older 3.0 vs the new 3.1 std, the older USB 3.0 was renamed as USB 3.1 Gen 1 (with per lane speeds of 5Gbits/sec). The newer std of USB 3.1 was renamed as USB 3.1 Gen2 (with per lane speeds of 10Gbits/sec). USB 3.1 Gen2 still used 8B/10B encoding (same as the original USB 3.0 spec). USB 3.1 spec was backward compatible with USB 3.0 and USB 2.0. From now on, there was USB 3.1 spec and USB 3.0 became obselete (USB 3.0 got rebranded as USB 3.1 gen1).
  • USB 3.2: incremental update to USB 3.1, came out in 2017. It doubled the speeds to 20Gbits/sec, while still preserving SS and SS+ speeds from prev gen. It was called USB 3.2 and replaced the older USB 3.1 std.  In order to double the speeds, it used 2 lanes for data xfer, instead of single lanes that were used until now. To support dual lanes, it required new type of connectors, called Type C connectors. These Type C connectors introduced the concept of Alternate mode (explained later). In order to support all prev gen, it's naming got more complex. Below naming is what is used. x1 or x2 implies single or dual lane. Gen 1 implies lower speed per lane, while Successive Gen imply higher speed per lane. Gen 1 has speed of 5bps/Lane, Gen2 has 10gbps/Lane, Gen3 has 20gbps/Lane while Gen4 has 40Gbps.Lane.
    
    • USB 3.2 Gen 1x1 = this is USB 3.1 Gen1 (aka USB 3.0, SS). Still supported single lanes (x1), so could use older connectors. Speed = 5Gbps/Lane, Lanes=1, Net speed or throughput =5Gbps.
    • USB 3.2 Gen 2x1 = this is USB 3.1 Gen2 (aka SS+). Still supported single lanes (x1), so could use older connectors. Speed = 10Gbps/Lane, Lanes=1, Net speed or throughput =10Gbps.
    • USB 3.2 Gen 1x2 = This is proper USB 3.2, with lower speeds. This has same speed as USB 3.1 Gen2 (SS+) of 10Gbits/sec, but has higher throughput because of more efficient coding of 128B/132B. It supplies data over 2 lanes (x2) with SS speeds, so kind of similar to USB 3.1 Gen1, but repeated twice (effective clk freq = 5Ghz). It needed newer type C connectors, to support dual lanes. Speed = 5Gbps/Lane, Lanes=2, So Net Speed or throughput =10Gbps.
    • USB 3.2 Gen 2x2 = This is proper USB 3.2, with higher speeds. This has higher speeds of 20Gbits/sec. It supplies data over 2 lanes with SS+ speeds, so kind of similar to USB 3.1 Gen2, but repeated twice (effective clk freq = 10Ghz). It needed newer type C connectors, to support dual lanes. USB 3.2 Gen 1x2 and Gen 2x2 is what we commonly see in today's devices which have USB PD connectors. These use both lanes (lane0 and lane1) for data xfer. Speed = 10Gbps/Lane, Lanes=2, So Net Speed or throughput =20Gbps.
• USB4 (or USB 4.0): This new std announced in 2019, replaces all earlier std. It doesn't have a space b/w USB and 4 in it's name (it's written as USB4 and NOT "USB 4". However, most online docs and specs still write it as USB 4 which is incorrect), and is not expected to have further iterations as 4.1, 4.2, etc. It works only on Type C connector (with USB PD running too). It supports speeds from 20Gbps to 120 Gbps. It also supports more AltMode xfer than USB 3.2 (ThunderBolt3 as well as Display port). USB4 by itself does not provide any generic data transfer mechanism as USB 3.x, but serves mostly as a way to tunnel other protocols like USB 3.2, DisplayPort, and optionally PCI Express. The biggest advantage of USB4 is that it allows to share bandwidth b/w video and data.
  
  • USB4 Version 1: This is version 1.0 that was released on 2019. It has double the max speed of USB 3.2 with speeds up to 40Gbits/sec (20Gbits/sec per lane). It initially supported altMode DP 1.4 only, but in 2020, spec provided support for altMode DP 2.0 too. DisplayPort 2.0 can support 8K resolution at 60 Hz with HDR10 color and can use up to 80 Gbit/s which is same amount available to USB data, but just unidirectional. It's named as Gen2 for speeds similar to USB 3.2 and Gen3 for higher speeds. Below are USB4 Gen2 details:
    
    • USB4 Gen 2x1 = This has same speed as USB 3.2 Gen 2x1. It has single lane at 10Gbps. Speed = 10Gbps/Lane, Lanes=1, Net speed or throughput =10Gbps.
    • USB4 Gen 2x2 = This has same speed as USB 3.2 Gen 2x2. It has dual lanes at 10Gbps per lane for a total of 20Gbps. This is marketed as "USB4 20Gbps" or "20" written on peripheral instead of "SS 10" or "SS 20" that was written for USB3. Speed = 10Gbps/Lane, Lanes=2, So Net Speed or throughput =20Gbps.
    • USB4 Gen 3x1 = This is real USB4 where speed for single lane is doubled to 20Gbps. It has single lane at 20Gbps. Speed = 20Gbps/Lane, Lanes=1, Net speed or throughput =20Gbps.
    • USB4 Gen 3x2 = This has Gen 3 with dual lanes at 20Gbps per lane for a total of 40Gbps. This is marketed as "USB4 40Gbps" or "40" written on peripheral instead of "SS 10" or "SS 20" that was written for USB3. Speed = 20Gbps/Lane, Lanes=2, Net speed or throughput =40Gbps.
  • USB4 Version 2: This is Version 2 that was released in 2022. It doubled the speed to 80Gbps (40 Gbps per lane). It's named as Gen 4. It works in both Symmetric and Asymmetric mode where number of TX lanes doesn't need to be same as number of RX lanes. Below are USB4 Gen3 details:
    
    • USB4 Gen 4x1 = This is Gen 4 where speed for single lane is doubled to 40Gbps. It has single lane at 40Gbps. Speed = 40Gbps/Lane, Lanes=1, Net speed or throughput =40Gbps.
    • USB4 Gen 4x2 = This is Gen 4 with dual lanes at 40Gbps per lane for a total of 80Gbps. This is marketed as "USB4 80Gbps" or "80" written on peripheral? Speed = 40Gbps/Lane, Lanes=2, Net speed or throughput =80Gbps.
    • USB4 Gen 4x3 = This is Gen 4 with triple lanes at 40Gbps per lane for a total of 120Gbps. This works in Asymmetric mode, where 3 lanes are used for TX and 1 lane for RX or vice versa. Speed = 40Gbps/Lane, Lanes=3, Net speed or throughput =120Gbps.

USB connectors:

USB connectors also come in different types (for each type, they may come in different sizes):

1. Type A: This has standard 4 pins. It plugs into downstream facing ports (DFP), i.e host is the source. It came in one size called Standard USB connector. This is the most commonly used USB connector that is seen in USB drives, laptops, etc. Later in 2000, a mini usb connector was released, that was about half the width of standard connector. It was used in camera, Mp3 players, etc, but has been phased out since 2018. A successor to Micro USB is mini usb, which is even smaller and more flatter. This is the most compact form of usb connector, and is seen in phones, tablets, etc. which was flatterIt comes in 2 sizes: Standard and Micro.

Pins:    GND   D+   D-   VBUS => 4 pins 

2. Type B: This also has standard 4 pins. It plugs into upstream facing ports (UFP), i.e device is the sink. Here, the connector size is different. It's square shaped, and is mostly seen in printers.

3. Type C: This is totally new connector with 24 pins, is reversible and is round shaped. As the whole USB arch changed with type C, these required new connectors called as Type C connectors. Unlike Type A and Type B connectors, which came in diff sizes, Type C connectors come in only 1 size. Starting with proper USB 3.2, we need type C connectors to get higher speeds.

• D+/D- pins are retained to provide USB 2.0 functionality
• 2 lanes of TX1/RX1 and TX2/RX2 provide dual lane capability to do high speed data xfer for USB 3.0 and above (GHz speeds)
• SBU1/SBU2 pins are for providing side band signals.
• CC1/CC2 pins are for providing configuration channel signals (used for PD protocol explained below)

USB Protocol:

USB 2.0 and earlier had only 4 pins, with only D+ and D- for data line. Basically data was the only signal sent out, with no associated clock. Data was sent with enough transitions so that a clock could be recovered out of it. This makes it simple to understand the transactions. USB3 and later become overly complicated, and not so easy to understand transactions.

This video connects an oscilloscope to the 2 usb data wires (D+ and D-) going from keyboard to PC, and examines the traffic, and figures out all transactions by manually drawing them on a piece of paper. Excellent video if you want to understand basic packet communication for USB2.

How does a USB keyboard work (by Ben Eater) => https://www.youtube.com/watch?v=wdgULBpRoXk

Power Delivery (PD):

With type C came a whole new functionality for power delivery. Until now, USB was primarily for data xfer. However with advent of portable devices that did not need much power to operate, the power pins on such portable devices were omitted. Instead, portable devices started drawing their power from 2 USB pins => VBUS and GND. This was OK in 1990s, as power delivery of 0.5W in USB 1.0 from USB host was sufficient to power these small devices. However, power requirement of these portable devices started going up in early 2000. To accommodate that, USB standards added power delivering capability of up to 2.5W in USB 2.0.

Then battery charging protocol was released in 2010 for USB 2.0 known as BC 1.1. This allowed up to 7.5W power from USB ports. What power to deliver was based on Resistance values on D+/D- pins. Refined BC 1.2 spec was released later. BC protocols are very complex and confusing. We'll not go into more details on those.

PD 1.0:

However, with power requirements for portable devices further increasing, a new spec for power delivery known as PD 1.0 was released. This allowed >7.5W power to be delivered over USB power pins. It was supported over Type A and Type B connectors.  Devices can request higher power from host. Voltages of 5V, 12V and 20V on VBUS were now supported, with currents up to 5A, resulting in 100W max power delivery. However, for V>5V, and I>3A, dedicated power communication pins as CC1/CC2 were needed, which were part of USB Type C spec.

PD 2.0:

With the release of USB 3.1 spec, PD 2.0 was released as part of this spec. It allowed power delivery to happen over USB Type C connectors/cable with special dedicated pin for power delivery communication. These new pins for power related communication were CC1/CC2 pins. Power was delivered over 4 VBUS pins. However for backward compatibility, previous BC1.2 and PD1.0 were still supported over D+/D- pins.

PD 2.0 is :

- single wire protocol on CC wires

- DFP is bus master and initiates all communication

- All msg are 32 bit 4B/5B encoded. It uses BMC (Biphase Mark Coded) encoding, which is a version of Manchester coding.

- It has a Baud rate of 300K (i.e clk rate of 300KHz), so pretty low frequency (wich is OK, since power requirements do not change frequently, i.e in uS)

- It supports CRC error detection + message retries

Out of the 2 configuration channels, CC1/CC2, one of them is used for cable orientation detection, while the other one is used for PD purpose. CC wire for PD communication needs to have valid resistances tied to Power/Gnd. That is how the USB logic figures out which of CC1 or CC2 to use for PD purpose.

CC wire for PD should have 5Kohm resistance tied to GND for UFP (sink device such as mouse), and 10Kohm to 55Kohm resistance tied to VBUS for DFP (host device such as PC). These resistance serve as a voltage divider determining the final voltage level of CC wire. This voltage determines initial current level supported by USB.

Rd = pull down resistance = 5 Kohm

Rp = pull up resistance = 3 different values:

•  56 Kohm = default = 0.5A @ 5V for USB 2 and 0.9A @ 5V for USB 3. Voltage level on CC wire = 5/(56+5) * 5V = 0.4V
• 22 Kohm = 1.5A @ 5V. Voltage level on CC wire = 5/(22+5) * 5V = 1.0V
• 10 Kohm = 3.0A @ 5V. Voltage level on CC wire = 5/(10+5) * 5V = 1.65V

Any voltage > 1.65V on CC wire is taken as no connection, as then the pull down resistance is assumed to be much larger than 5 Kohms (ideally Rd is infinity, and voltage detected on CC wire would be 5V)

Successful attachment of connector would be indicated by presence of a valid voltage on one of the CC wires. that wire would be used for PD communication. Once a default power supply is provided based on resistance values, further PD communication can now happen on CC wire. This PD communication happens via messages sent b/w src and sink. Voltage level on VBUS and higher currents can only be supported after successful negotiation.

PD controller: There is a separate chip called "PD controller" chip that is provided by major vendors as TI, STM, etc that provides all the functionality to deal with PD communication. It takes in D+/D- lines as well as CC1/CC2 lines, and does all power negotiation work to put correct voltage and current on VBUS. High speed data lines go thru another chip which is the main USB data controller chip. D+/D- lines alo go to this main controller chip, as they carry data too. The reason D+/D- go to PD controller chip is to determine power delivery for USB 2.0 (they aren't used for data communication purpose at all in the PD controller chip).

Alternate Mode:

A very useful mode in USB Type C connectors is Alt Mode. Here, it allowed these connectors to support not only native USB mode data xfer, but also alternate mode data xfer (aka AltMode) for other protocols (as Display Port and HDMI protocols) on the same wires. 

Alternate modes are defined and configured via USB PD protocol. Same CC1/CC2 lines are used for AltMode configuration. Structured VDM (vendor defined messages) are used on CC lines to enter AltMode. Unused pins on USB-C are used for Alt Mode of operation.

Display Port (DP) AltMode: This is one of the Alt Mode supported on USB-C. DP protocol requires 4 lanes (8 pins, since differential signals) for data xfer, 1 lane as auxillary channel (2 pins, since differential signals), and 1 wire as HPD (hot plug detect = this line is used by upstream device to detect plugging of downstream device).

DP Alt Mode allows TX1/RX1 and TX2/RX2 lanes to be used as Data lanes for DP, and SBU1/SBU2 to be used as auxillary lanes (since auxillary lanes do not have high speed requirement, these 2 lines can be used as differential lines), and HPD line is provided by the USB PD controller. There is a mux that is controlled by the PD controller. This mux takes data from USB lines, and routes them to either USB contoller (for regular mode) or to Display devices (for AltMode). The 4 data lanes are all unidirectional as display data only goes from source to sink (to be consumed), so all 4 lanes are configured as TX lines. DP is called as simplex protocol (unidirectional xfer), while USB protocol is duplex protocol (bidir xfer).

ThunderBolt3 AltMode: This is another AltMode supported on USB-C for USB4 protocol.

USB4 AltMode: This is yet another AltMode

MultiFunction AltMode: A combination of regular mode on one of the lanes and AltMode on another, i.e USB3.2 + DP