PrimeTime: gate level STA tool. dynamic analysis requires input vectors and simulating those, so may not capture all possible paths. PT has most of the same timing cmd as used in DC.

  •  It takes gate level netlist in: .db, .v, .vhdl format
  •  It takes delay info in std delay format (SDF). Both net and cell delay are in this file. This file is optional. In absence of this file, SPEF and .lib files used.
  •  It takes parasitic data in std parasitic exchange format (SPEF). Only net delays can be calculated here by using parasitics from SPEF. when SDF not vailable, SDF generated from SPEF, and used for net delays. It takes cell delays from .lib.
  •  It takes timing constraints in synopsys design constraint (SDC) format

For prelayout (synthesized netlist with no PnR) timing analysis, cell delay come from .lib and net delay come from wire load models which estimate delays based on estimated cap and res of nets. PT supports use of timing models to represent chip submodules or std cells. Liberty model (.lib) is widely used model that it supports.

PrimeTime Invocation: Explained under STA PT flow on how to bring up PT tool.

Primetime cmds:

Looking at PT manual for 2018 (it can be downloaded from synopsys solv, it shows around 700 cmds, but only 100 or so cmds are useful. Some of the important cmds from Synopsys DC (Design Compiler) are used in PT also. A subset of cmds from DC have been used to form sdc standard (see in sdc section) for design constraints.

Cmds in synopsys can take any input which are collections or list of object names, and returns o/p as collection or list of object names. Thus there can be 4 categories of cmds as shown below. Which cmd falls into which category depends on the particular cmd.

  1. i/p=collection, o/p=list
  2. i/p=collection, o/p=collection
  3. i/p=list, o/p=collection
  4. i/p=list, o/p=list.

NOTE: many cmds which take collection as an i/p can also take lists as an i/p.

1. report_* cmds (100's of them): These report cmds are used for reporting anything about the design on the screen. They take as i/p list of objects, and return o/p as list.These cmds should be used for reporting anything, as they dump names on the screen, or can be redirected to other file. Since, we get these o/p as list (not collection), so they can be viewed directly w/o any further processing. report_timing is most useful cmd here. You should first try to use "report_*" cmds, and if they don't give you the info you need, then you should use "get_*" cmds (explained below) as they are more comprehensive (also get_* cmds are more cumbersome to use)

2. get_* cmds (50 of them): These take as i/p collection or list of objects, and return o/p as collection. Since the o/p is a collection, we have to post process the collection by taking it thru a for loop and then print whatever we want to print. These are useful when used within a script, but not very useful for quick reporting purpose. Do not use this when you just want to display something for reporting. Use report_* cmds for reporting purposes. These get_* are most commonly used cmds for writing tcl scripts within PT.

3. remove_* cmds (100's of them): These are used to remove something from design all together. These are not used that often. They are mostly used used during debug, when we have added some object incorrectly, and we want to remove it. Or we want to start from clean slate, and so use remove_* cmd in the very beginning to remove things in design that we don't want.

4. design related cmds: create_*, read_*, write_*, set_*, reset_*. These cmds are most useful for setting constraints on design, so that we can analyze timing paths in design.

  • set_* cmds (100's of them) => Thsese are used to set various attr for design.
  • reset_* cmds (20 or so cmds) => Just like remove_* cmds, they are used during debug to reset something previously set using the set_* cmd. So, reset_* cmds just undo the effect of corresponding set_* cmd.
  • read_* cmds (20 or so cmds) => Used for reading external files, design, etc.
  • write_* cmds (20 or so cmds) => Used for writing to o/p files. These are counterpart of read_* cmds.
  • update_* cmds (update_timing, update_power, update_noise) => These cmds are used to update timing, noise or power for the current design. Design is automatically updated if needed for reporting that aspect of design (without us explicitly needing to do it). So, we'll use these rarely.
  • current_design / current_instance => shows current design that it's set to. It may be top design, or one of the hier. It's
  • current_instance =>

5. all_* cmds: Couple of cmds here to see all ports, regs, clks, etc. Helpful and commonly used.

6. list_* cmds:

7. check_* cmds: These are used to check some important aspect of design. These cmds are a sanity check to make sure there's nothing wrong with that aspect of design. We should always look for errors/warnings in these check_* cmds, as they check_timing is most imp cmd here. There are just 6-7 cmds here as check_power, check_noise, check_constraints, etc.

8. misc cmds:

A. alias/unalias: these can be used to set alias just as in Linux, so that we don't have to type lengthy cmds. We can't set alais for an existing cmd. We have to unalias that cmd, and then alias it again.

ex: alias rt { report_timing -max_paths 100} => Now whenever we type rt as the first word in pt_shell, it will automatically expand it to the cmd shown.

B. ETM: Extracted Timing model. As explained in liberty section, we can generate an ETM for any design. The PT cmd for this is:

extract_model => this generates an ETM for current design from it's gate level netlist. The generated model is in .db format (synopsys proprietary liberty format), and exhibits the same timing characteristics as the original design and therefore is used instead of the gate-level netlist for purposes of static timing analysis. Look in PT manual for various options. There are also 30 or so attributes or variables that can be set to control what kind of timing data is present in ETM .db file. These are shown in PT variable attribute manual. These attr are extract_model_*

PT CMD PRECEDENCE: In PT you may write same cmd multiple times on different objects, and all of them are applied simultaneously. What happens if the same object has 2 conflicting cmds applied to it? Which on takes precedence? We don't do it based on "whichever last one overwrites earlier ones. Reason for not doing this is this. Let's say you have a "set_max_delay" set on a set of paths, and then later on you do "set_max_delay" on some overlapping paths from before. PT has no way to overwrite previous cmd, since cmds may be undone by doing "remove_*" cmds only. So, PT has to look at all cmds simultaneously, and then come up with a strategy of prioritizing cmds. This  PT manual says that cmds which are more specific will take precedence over cmds that are more general. This holds in general for all cmds with the exception of "set_false_path". See in set_false_path section for that.

Ex: group_paths cmd sets groups. We can have paths overlapping in 2 groups. i.e

1. group_path -name io_to_flop -from [all_inputs]
2. group_path -name io_to_io   -from [all_inputs] -to [all_outputs]

Here paths from input are part of both groups. However, group2 (io_to_io) is more specific. So, all paths from input which goto output are put in group2. Then remaining paths from input are put in group1 (io_to_flop).

However, if 2 constraints are conflicting and none of them is more specific than the other, then I'm not sure how the precedence rules work ??

 

 

USA Income and Taxes:

To look at the US economy, we have to first look at the total income of all the people living here, as well as their wealth.

US income/wealth percentile:

This data is for around 2020-2025. 

There's a neat income percentile on this link: https://dqydj.com/income-percentile-calculator/

There's also a wealth percentile here: https://dqydj.com/millionaires-in-america/

We saw in other USA sections, that there are about 130M households and about 150M working population in USA. Income percentile refers to percentile in these 150M workers, i.e top 5% means in the top 7.5M earners. Wealth percentile refers to these 130M households, i.e top 10% means you are in the top 13M households. Wealthier households are usually middle age or old age household as it takes 20 years or more to accumulate enough wealth to get to top percentile with a day job.

  • 0%-70%: We see that every $1K in income gets you 1 percentile higher upto $70K in income. That means if you have $1K in income, you are in bottom 1%, while if your income is $70K, you are in 70 percentile. So, 0% to 70% goes up linearly with income. After this starts slight non linear curve.
  • 71%-80%: Here, income goes up by $2K for every 1%. 70% starts at $70K in income, and 80% ends at $92K in income.
  • 81%-90%: Here, income goes up by $4K for every 1%. 80% starts at $92K in income, and 90% ends at $132K in income.
  • 90%-95%: Here income start going exponentially higher, and you need to make $10K more to get up by 1%. Income start at $132K and end at $186K. About 15M or 12% households are millionaires, meaning most of them are in this income group starting at 90% and above.
  • 96%-99%. Here income go even more exponentially higher, and to make it to the top end of this income group, you need to make at least $500K. About 5M or 4% households have $4M or more in assets, and they are usually earners in this group.
  • Top 1%: These are the richest people, who not only make > $500K/yr, but also have wealth > $10M. About 1M households have wealth > $10M, with 100K households having wealth > $50M, and 30K households having assets > $100M.  These 30K huseholds are who's who in America, and are generally well known. This is the chart showing top 1% of households income wise per state. As can be seen, in richer states as Connecticut, Masschusetts, California, New york, your household needs to being in close to $1M, while in poorer states as West Virginia, Mississippi, New Mexico, etc, just $0.5M will get you there.

Bottom 90% of the people are so poor they they live and die as slaves. More on this in another article. "For the bottom 60% of U.S. households, a "minimal quality of life" is out of reach, according to the group, a research organization focused on improving lower earners' economic well-being. " Link => https://www.cbsnews.com/news/cost-of-living-income-quality-of-life

 

 


 

IRS income data

A lot of tax and income data available on IRS website. We want to just get an idea of how income of the population lines up.

IRS data taken for years, 2017, 2011 and 2007 (taken from here: https://www.irs.gov/statistics):

Types of returns filed: 3 major kind of tax returns filed, which account for 80% of tax revenue:

A. Individual tax returns: Filed by individuals like you and me. These are the 1040 forms filed. I'm showing data for 3 years: 2007, 2011 and 2017.

2017:

Selected data pulled from IRS stats file here: https://www.irs.gov/pub/irs-soi/17in14ar.xls

This is the 1040 form which the above table refers to: https://www.irs.gov/pub/irs-prior/f1040--2017.pdf

152M individual tax returns (form 1040)  filed.  73M were returns of single persons, 55M were returns of married filing jointly and 22M were returns of heads of households, and 3M were married filing separately.

AGI (line 37 in form 1040): AGI is Adjusted gross income and is line 37 in form 1040. Total AGI was $11.1T.

Number of returns with AGI > $500K was 1.5M or about 1% of total returns. 1M of these returns had AGI < $1M. So, once you start hitting AGI of $1M, you get in top 0.3% of population. Total cumulative AGI for this group is $2.3T (avg AGI = $1.5M). Only $0.9T of this income came from wages/salaries. $0.6T came from sale of capital assets, $0.1T from dividends, $0.6T from partnerships and S corps. In fact, as you go higher up in AGI, higher percentage of income comes from passive assets and not from wages (for people with AGI > $10M, income from assets is 6X their wages. So, decline in price of stocks/equities will hurt this top 1% very disproportionately as 25% of their AGI will evaporate in absence of capital gain (as they can't sell stocks for profit when markets are down for the year).

Number of returns with $200K < AGI < $500K were 6M or 4% of returns. So, an AGI of $200K or more places you in top 5% of working US population. Total cumulative AGI for this group is $1.8T (avg AGI = $300K).

Number of returns with $100K < AGI < $200K were 20M or 14% of returns. So, an AGI of $100K or more places you in top 20% of working US population. Total AGI for this group is $2.7T (avg AGI = $130K).

Number of returns with AGI < $100K: Remaining 125M returns fell in this category. This represents bottom 80% of the population. These are the poorest people with very little savings, and little assets. Their combined AGI is $4.5T (avg AGI = $36K), which is about half of tthe total AGI of entire US workforce. Their AGI is mostly comprised of wages, and SS/pensions. 80% of AGI, or about $3.5T comes from wages. Remaining $0.5T comes from retirement accounts, and $0.5T from Social security benefits. So, most of the retired people fall in this category. Also, most of the youngest workers under 26 years of age fall here too, as they are just starting. 2M returns are for people under 18 years of age, totalling $0.01T while 23M returns are for people between age of 18 and 26 years of age, totaling $0.45T. So, 25M returns are from people under 26 years of age, who mostly fall in AGI < $100K. When you hear about unemployment in news, this is the group that is most vulnerable, and comprises of most unemployed people. This bottom 80% drives the so called economy, as whatever they make gets spent, with negligible savings. About 50M people have non taxable returns, meaning they owe $0 in federal income taxes. Looking at table about 54M returns had AGI < $25K (or income below poverty line for a family of 4, with 2 kids and 2 adults. For an individual, poverty threshold is at $13K), so most likely these are the people having non taxable returns, since std deduction and many other credits can wipe out taxes. US census.gov website shows 11% of people below poverty line, while here we see 35% of population with AGI below $25K. Reason is many individuals filing return as single person are above poverty line, since poverty threshold for households with single person is at $13K.

Social security website shows that about 6% of returns filed have earnings over maximum taxable limit for social security for each year since 1980. Congress adjusts the Social Security limit every year to keep this 6% number constant. For 2017, the limit was $127K. This limit has doubled from $68K in 1998 to $138K in 2020, implying that wages/salaries for top 6% are rising at an annual rate of 3.5%.

https://www.ssa.gov/policy/docs/population-profiles/tax-max-earners.html

Bottomline: So, to be in top 5% and to stay there, you need wages > $130K and AGI > $200K for year 2017, and both of these need to go up by about 4% every year starting from year 2017. Also, you need to have extra income from dividends, interest, stocks sale, comprising at least 1/2 of what you get in wages/salaries. So, that way your AGI comes out to 150% of your wages.

AGI componenets: Various components of AGI are as follows:

wages/salaries (line 7 in form 1040) = $7.6T (126M returns), So, that leaves 26M returns (since total returns=152M) with no wages/salaries, which is mostly older retired people and disabled people. 29M returns had Social security benefits amounting to $0.6T. 15M returns had IRA distributions totaling $0.3T. These are mostly older people not in workforce. This implies that 26M returns are filed by people not employed (i.e old people living off social security, disabled people, etc). Looking at other table, we see that 26M returns were for people 65 and older, with collective AGI of $2.1T, out of which only 9M had salaries and wages totaling $0.5T.

interest (line 8 in form 1040) = 0.16T : taxable interest = $0.1T (44M returns), tax exempt interest = $0.06 (6M returns), => about 35% of returns have money earned thru bank account CD, savings a/c, etc. So, 2/3 of workforce don't even have bank accounts or don't earn any interest. Of the bottom 80% with AGI < $100K, 26M had taxable interest income totaling $0.025T. So, 80% of the interest income is attributed to top 20% of people, since they have savings. However, total deposits in US banks is over $10T, so $0.1T interest implies 1% interest rate, which is the highest rate banks offered in the last decade. So, basically income from interest has evaporated.

dividends (line 9 in form 1040) = 0.28T : ordinary dividends = $0.28T (28M returns), qualified dividends = 0.22T (26M returns), => about 20% of all returns have money earned thru stocks, since qualified dividends mostly comes thru stocks. That's a very high percentage of people invested in stock market thru their personal ccounts, considering that only 35% have bank accounts. Of the bottom 80% with AGI < $100K, 16M had ordinary dividend income totaling $0.05T. Here, just as in interest income above, 80% of the dividend income is attributed to top 20% of people. People with AGI in range $100K < AGI < $500K made about $0.1T in dividend. Assuming most of the dividend comes from US equities, it implies, that top 20% of the people have a lot of money invested in equities/stocks. Looks like all of America owns equities, with top 1% owning 50% of equities. Also, let's assume that $500B paid in dividends was paid by US companies in 2017 (no reliable source found for this but that's the range dividends have been around 2015-2020 ? FIXME?). Since ordinary dividends are $0.28T, then this implies that about 50% of US equities are owned by people in their personal accounts, while remaining 50% is held in their retirement accounts. Note that most of the equities held in personal accounts is for people in top 10%.

sale of capital assets (line 13 in form 1040, schedule D) = $0.8T (17M returns), Of these, about 6M returns filed for net cummulative loss of $13B. Reason for such low net loss is because losses are limited to $3K/return, so net loss could not exceed 6M*$3K = $18B in any given year. Again, people with AGI <$100K (or bottom 80%) of people had just $0.05T in cummulative capital gain, which is just 5% of all capital gains. Top 1% had capital gains totaling $0.6T or 75% of all capital gain. Sale of capital assets include house, stocks, and many other assets. Looking at tables on irs website for "capital gain/loss by asset type for year 2012" didn't give a clear picture on how much of this is from stocks and how much from other assets.

partnership and S corp income (line 17 in form 1040) = $0.7T (7M returns). Many individuals also form partnerships to open corporations. The profit from these corporations pass thru their individual income tax return,

rental and royalty income (line 17 in form 1040) = $0.05T (11M returns)

Of 26M returns that didn't have wages (152M-126M), most of them are either old/disabled people collecting SS/IRA/401K, or people with their own business

business income (line 12 in form 1040) = $0.35T (26M returns). Surprising that 20% of workforce have their pwn business. Probably a lot of mom/pop shops or franchises. What's interesting is that about 6.5M or 25% of these business returns had net loss. If that's true then a lot of these individual business would go bankrupt every year.

pension/annuities (line 16 in form 1040) = $1.2T (30M returns). distributions from 401K plan are reported under this on line 16a, 16b of form 1040. 18M returns were from people over age of 65, totaling $0.7T, while 6M returns were from people between age of 55 to 65, totaling $0.3T. As expected, 80% of this income is attributable to people in retirement.

taxable IRA distributions (line 15 in form 1040) =$0.26T (12M returns), here distributions from personal IRA accounts (not thru work) are reported on line 15a, 15b of form 1040. 11M returns were from people over age of 65, totaling $0.21T, while 2M returns were from people between age of 55 to 65, totaling $0.05T. As expected, 80% of this income is attributable to people in retirement.

Social security benefits (line 20 in form 1040) = $0.6T (29M returns),

unemployment compensation (line 19 in form 1040) = 0.1T (13M returns) and others were misc items.

Of this AGI, 100M returns applied for std deduction of $0.75T, while 45M returns applied for itemized deduction of $1.2T. So, Taxable income was $5.7T after accounting for deductions, exemptions, tax credits, etc. IRS collected a tax of $1.05T (~20% of taxable income).

2011: 145M individual tax returns (form 1040)  filed.  67M were returns of single persons, 53M were returns of married filing jointly and 22M were returns of heads of households, and 3M were married filing separately.

Total AGI was $8.4T. Various components of this are:

wages = $6.0T (120M returns),

interest = 0.2T : taxable interest = $0.12T (52M returns), tax exempt interest = $0.07T (6M returns), => about 35% of returns have money earned thru bank account CD, savings a/c, etc.

dividends = 0.35T : ordinary dividends = $0.2T (28M returns), qualified dividends = 0.15T (25M returns), => about 20% of returns have money earned thru stocks

capital gains = $0.4T (22M returns),

partnership and S corp income = $0.4T (8M returns),

rental and royalty income = $0.05T (11M returns)

Of 25M returns that didn't have wages (145M-120M), most of them are either old/disabled people collecting SS/IRA, or people with their own business

business income = $0.3T (23M returns),

pension/annuities= $0.6T (27M returns),

Social security benefits = $0.2T (17M returns),

taxable IRA distributions=$0.2T (13M returns)

unemployment compensation = 0.1T (13M returns) and others were misc items.

Of this AGI, 100M returns applied for std deduction of $0.75T, while 45M returns applied for itemized deduction of $1.2T. So, Taxable income was $5.7T after accounting for deductions, exemptions, tax credits, etc. IRS collected a tax of $1.05T (~20% of taxable income).

2007: 142M individual tax returns (form 1040)  filed.  Total AGI was $8.7T. Of this wages = $5.8T, capital gains = $0.9T, pension/annuities= $0.5T, partnership and S corp income = $0.4T,  business income = $o.3T, taxable interest = $0.25T, ordinary dividends = $0.25T, Social security benefits = $0.2T, taxable IRA distributions=$0.2T and others were misc items. Taxable income was $6T after accounting for deductions, tax credits, etc. IRS collected a tax of $1.1T (~20% of taxable income).

B. Employment tax return: This tax return has to be filed by employers to pay social security and medicare tax to the government. Note that each employed person in USA is supposed to pay 12.4% SS tax and 2.9% Medicare tax. If you are self employed, you pay all of this, but if you are employed by someone, you pay one half and your employer pays the other half. Most of the people are employed by someone else, so their employer files tax form 940, and pays this tax to IRS. We as employees never see this tax return being filed, as money is already taken out of our paycheck by the employer. Employer then files this separate tax return paying his share (6.2%+1.45%)as well as paying the money that he took out of our paycheck (6.2%+1.45%). Self employed people file this return themselves. There were 30M such tax returns filed for 2007. Employers don't file separate tax return for each employee, but combine it in one for all their employees. So, this tells us that there were 15M employers (as 15M are self employed people. If we assume that each employed person paid about $6K in SS+Medicare tax (assuming median income of $50K), then for 150M employees (for 2008, workforce was about 155M), that would be about $1T in employment taxes.

C. Corporations: 7M corporate tax returns were filed for 2008.

D. Partnership: 3M partnership returns were filed for 2008.

There are 2 kinds of business: unincorporated and incorporated.

A. Unincorporated business: The revenue, expenses and income of business flows thru personal tax return. It has unlimited liability, is unable to defer taxes, and must file income taxes based on calender year. It's simple to set up these kind of business, and they have no payroll. These business are also called non employer or self-employed firms, and are genrally excluded from all business statistics from census bureau, as they account for only 3% of all business receipts in USA.

UnInc business, are further subdivided into 3 types as per IRS classifications:

1. Sole propertierships: someone who owns an unincorporated business by himself or herself. Generally non-farm sole propertiership are included in all stats.

2. Partership: relationship existing between two or more persons who join to carry on a trade or business. Each person contributes money, property, labor or skill, and expects to share in the profits and losses of the business. Partners may be individuals, corporations, other partnerships, tax-exempt organizations, nominees, or other legal entities. Partners are not employees and should not be issued a Form W-2. The partnership must furnish copies of Schedule K-1 (Form 1065) to the partners.

3. S-corporations: These are an alternative to Inc corp, but they should have no more than 100 shareholders, and have one class of stock. S corporations avoid double taxation on the corporate income, as income is passed thru tax on individual's income tax return.

B. Incorporated business: Usually represented by Inc at the name of business. The revenue, expenses and income of business flows thru corporate tax return, at corporate tax rates (usually 35%). The profit is again taxed when it's distributed to shareholders as dividends. It has unlimited liability, credit proofs its shareholders, is able to defer taxes, and file income taxes based on their own fiscal year which may or may not coincide with the calender year. It's complex and expensive to setup these kind of business, and it has payroll. There is only 1 type of Inc business, known as C corp.

LLC: A Limited Liability Company (LLC) is a business structure allowed by state statute. LLCs are popular because, similar to a corporation, owners have limited personal liability for the debts and actions of the LLC. Other features of LLCs are more like a partnership, providing management flexibility and the benefit of pass-through taxation. The federal government does not recognize an LLC as a classification for federal tax purposes. An LLC business entity must file a corporation (C-corp or S-corp), partnership or sole proprietorship tax return.

Note that sole proprietorship, partners, S-corp are included above in individual income tax returns as the income from these flow through individual tax returns of owners and not through corporate tax on business (as in C-corp) itself.

Workforce

Workforce is comprised of people hired by government or by private companies. Total population of USA is 315M, of which 50% don't go for work. Of this 160M who don't go for work, 45M are elderly (65+), 75M are kids (<18) and 50M are stay at home mom/dads and disabled people. Remaining 155M want to work and are either working or looking for work. They are called the civilian workforce (Total number of people in the non-civilian workforce is 1.5M who are hired by the military). Since unemployment or underemployment is about 10%, we can assume that only 140M people are employed. Lets break this number further down:

I. Federal government: employs about 2M civilian workforce (on top of 1.5M military workforce), and is the largest employer in USA. It excludes postal service employees of usps. avg salary is about $100K.

II. State and local government: employs about 17M civilian workforce. 7M are employed in schools as teachers and support staff, 2.5M in protective services (including police officers, fire fighters, and correctional officers), 2.0M in higher education, 1.4M in health care (including nurses and other workers at public hospitals and clinics), 1M in libraries, housing, others, 0.8M in transportation (including road maintenance workers and bus drivers) and remaining 2M in all other professions. Link is:   http://www.cbpp.org/cms/index.cfm?fa=view&id=3410. about 35% of state and local government spending is on wages of these employees, excluding healthcare and retirement benefits. Including these benefits, about 45% of the spending is on wages.

so, about 15% of the civilian workforce is employed by Government (public employees), while remaining 85% is employed by private companies or are self employed. About 15M (10% of civilian workforce) is self employed, with 10M unincorporated self-employed (often work by themselves without employees) and 5M incorporated self-employed (often have employees).

In year 2007, there were total of 27M private non-farm business in USA, out of which 21M were unincorporated businesses (no employees), and 6M incorporated business (with employees). UnInc business brought in $1T in business sale receipts, while Inc business brought in $30T in sales receipts. This is the link from census bureau: http://www.census.gov/econ/smallbus.html

These 21M business which had no employees include the self-employed, freelancers, independent contractors, sole proprietorships, family-owned businesses, LLCs, corporations, S-corporations or partnerships. So, the number of unincorporated self employed above implies that out of 21M businesses with no employees, only 10M are actually a day to day business with an owner. The remaining 11M are just corporations, partnerships built for tax/liability advantages.

Ap per IRS data from 2007 (http://www.irs.gov/pub/irs-soi/07ot3naics.xls), there were 32M business returns filed (instead of 27M that's expected). These had business receipts of $30T, with net income of $3T. Of these, 23M returns were for no-farm sole proprietorship, which had $1T in business receipts and 0.3T in net income. 3M returns were filed for partnerships (Form 1065). The number of partners on these returns was 18M. Most of these partnerships are in Finance, Insurance, Real estate, construction, retail and other services. Net revenue from these partnerships was $5.9T (business receipts = $3.9T, portfolio income from interest/dividend/capital_gains=$1T, others = $1T) while net income was $0.7T ($0.3T was ordinary income while $0.4T was from dividends, interest, royalties, rental income, etc). total assets of these partnerships was $20T. About 6M corporations in USA (includes both C-corp and S-corp), but 4M of these are are S-corp or other pass through entities (like REITs, RICs, etc) which pay no corporate tax. These S-corp had business receipts of $6T, with net income of $0.4T. About 2M were C-corp, for which corporate income taxes were filed, which paid tax of $0.3T on taxable income of $1T (real income was $1.5T, but taxable income came down with deductions/credits. corporate tax rate is 35%). Total assets was $82T. Total revenue was $22T, of which business receipts were $18T. Total revenue is more than GDP as corporations sell not only to consumers, but also to each other.

So, if we take out these 15M self employed from the civilian workforce, we are left with 120M people, or about 75% of the workforce. This 75% of the workforce is hired equally by small business (Business having less than 500 employees) and large business (Business having more than 500 employees). Of the 6M businesses with employees, only 20K businesses had more than 500 employees.   These small businesses employed about 60M people, while large businesses (about 20K in number) employed the remaining 60M ppl. So, these small businesses had about 10 employees on avg, while large businesses had about 3K employees on avg. Large business are usually all public or large private companies, which have chains throughout the country. Small business are the ones run by a owner, hire few employees, and typically include all mom-pop stores that you see around, gas-stations, restaurants, motels, personal care, house maintenance contractors, or small internet companies.

Among the large businesses, Walmart is the largest private employer at 1.8M employees, followed by Mcdonalds and UPS each at 0.5M employees. USPS employes about 0.6M people and is the second largest cvilian employer behind walmart, but is generally not counted as a private employer. It has the backing of federal government. The top 50 largest employers, excluding usps, employed about 12M people. link: http://nyjobsource.com/largestemployers.html . Most of these companies are retail companies, and as such the salaries of majority of their employees are < $50K/year.

Employment taxes (FICA and medicare tax from both employees and employers): Total tax of $0.9T was paid to IRS.

Total money earned by individuals, corporations and Government:

individuals income=$7.6T(money kept in pocket) + $1.1T (federal tax) + $1.4T (approx state/local tax incl property taxes, as state/local tax for 2012 was $1.4T) + $0.9T( assumed contributions of 10% to IRAs, health insurance premiums,etc which are excluded from AGI)=$11T.

Corporations income=$1.1T(money kept in corp reserves) + $0.3T (federal tax) + $0.1T(dividends paid).

Federal Government income: total taxes collected by IRS = $2.5T amounting to 18% of GDP.  individual income tax=$1.1T, Corporate income tax=$0.3T, Employment tax=$0.9T, Excise/gift/estate tax=$0.1T, others=$0.1T.

sum total of all money = $11T(individual income) + $1.5T(corporate income)+ $1T(federal government income from Employment tax + other tax, which weren't included in individual or corporate income) = $13.5T (while GDP was $14T)

individual expense:

corporate expense:

Federal Government Expenses: total = $3T. defense = $0.7T, healthcare = $0.7T($0.4T to medicare for 45M elderly/disabled and $0.3T to medicaid/CHIP for 60M low income people),   pensions=$0.7T(mostly Social security avg check of $1.2K/month to 35M retired workers and 10M spouses/children of retired/dead workers, and 10M disabled workers), welfare=$0.4T (unemployment assistance, food stamps, low income assistance,etc) interest=$0.2T(on debt of $9T) , education=$0.1T, transportation=$0.1T and others=$0.1T.

GDP:

USA nominal GDP was approx $?T in 2011 ($14T in year 2007).

GDP components: GDP can be measured using income approach (sum total of income of all individuals living in a country during 1 year) or using production approach (Market value of all final goods and services calculated during 1 year) or using expenditure approach (All expenditure incurred by individual during 1 year ). Mostly expenditure approach is used, components of which are shown below:

A. personal consumption: = 70% of GDP. money spent by individuals on various items and services.

1. services: 40% of GDP. The two largest components are real estate (10%) and health care (12%)

2. non-durable goods: 20% of GDP. The three largest components are food (10%), clothing (2.7%) and fuel (2.4%)

3. durable goods: 8% of GDP. autos (3.6%) and furniture (3%).

B. Private/Business investment: 16% of GDP

1. Non-residential: 12%

2. Residential: 4%

C. Government investment: 19% of GDP

1. Federal Govt: 7% of GDP. defense spending=5%, non-defense spending=2%

2. state and local Govt: 12% of GDP

D. Import/export: -5% of GDP.

1. exports: 12% of GDP, with goods being 9% of GDP and services comprising 3%.

2. imports: 17% of GDP

 

 

 

Population:

Population in USA is about 310 Million as per 2010 census. ( https://www.census.gov/data/tables/time-series/demo/families/households.html ) There are 113 Million households (house, apartment, or any separate living quarter in which any number of people can live). 230M people are white (of these 50M people are of hispanic origin), 42M are black/african, 15M Asian (Chinese=3.5M, Indians=2.9M, Filipino=2.6M, Vietnamese=1.7M, Korean=1.5M) and 3M American Indians. Note that these refer to origin or race, not citizenship. So, a baby born to chinese citizens here will be a considered of chinese race, even though he and his parents are citizens here. About 60M are households with married couples, while 20M are other family households. About 40M are non-family households (people from different families sharing an apartment, or a person living by himself in a dorm, apt etc but who doesn't consider himself a family. Ex: kids in dorms, unmarried people with new jobs sharing apt, etc). Number of households increase by nearly 1M per year.

Population wise, California, Texas and Florida have been top 3 states (all with relatively warmer weather than rest of the country, so they have also been top states for retirement). 25% of US population lives in these 3 states.

Population growth:

world population is growing by 1.2% yearly as of 2010 (2.2% is birth rate, while 1% is death rate, resulting in net growth rate of 1.2%). India=1.4%, USA=0.8%, China=0.5% population growth. In year 2016 in USA, there were 4M births a year (40% to unmarried women) and 2.7M deaths (0.6M due to heart disease, 0.6M due to cancer, 0.2M accidents, life expectancy=79 years) resulting in net birth rate of 1.3M or 0.4% per year. Net immigration is 1.2M or 0.4% per year (green card=0.5M, other visas/illegal=0.7M), which causes US population to grow by 0.8% (2.5M people per year). By 2058, US population is expected to cross 400M. Population growth is expected to slow down to 1.5M people per year (0.4M will be natural increase, while 1.1M would be due to net immigration). So, net immigration is going to be the driving force for population growth in USA. If not for population growth from immigration, GDP growth would be less than half of what it is. So, USA does need people from other countries to keep on coming in for it's own good.

One noteworthy data from deaths based on age shows that 80% of the deaths occurred due to age age. For 2017, 0.9M deaths occurred at age of 85+. Other 0.3M for ages 80-84. In fact, 2.1M or 75% of the deaths occurred for people aged 65+, Since 60M people are age > 60 yrs in US, this implies that 5% of the people in this age group die every year. Deaths in age groups < 60 years is less than 0.2%.

https://www.cdc.gov/nchs/data/nvsr/nvsr68/nvsr68_09-508.pdf

Population growth via immigration based on country of birth.

This link gives important stats for year 2009: https://www.migrationpolicy.org/article/frequently-requested-statistics-immigrants-and-immigration-united-states-1/. US immigrant (foreign born irrespective of current citizenship) population as of 2009 was 39M (mexicans=10M, Phillipines=1.8M, India=1.7M, China=1.6M, Vietnam=1.2M). It increases by 0.5M or 1.5% every year (In 2016, it was 44M). In 2016, 1.5M new immigrants came to USA (Indians=180K, Chinese=160K, Mexicans=150K, Filipino=50K). Till 1970, there were only 10M immigrants, but started increasing rapidly since then, because immigration related strict laws (immigration and nationality act) were amended to more favorable laws in 1965 (immigration capped to 0.3M per year), particularly for immigration from Asia. Of the 39M immigrants, 17M became US citizens, 13M permanent residents, 11M unauthorized immigrants (not sure?) and remainder on various visas. Of these 39M, 90% of them came to USA on business/tourist visa, while 2M came on work-visa, while 1M on student visa.  Nearly 6M visa were issued in 2009, of which 4M were business/tourist visa, 0.4M were student visa(F-1, F-2, F-3) and their family, and 0.4M were exchange visitors (J-1, J-2) and their families. As can be seen that most of the people who came to USA on visa went back, since immigrant population on average goes up by 1M every year. About 0.5M new immigrants come thru green card and others thru illegal immigration, so only very few of these 6M people actually stay in US permananetly. These 39M immigrants make up 26M households. In 2009, nearly 1.2M immigrants become permananet residents of which 0.7M are existing immigrants, while 0.5M are new arrivals to USA. Also, 0.8M immigrants became US citizens (Mexico=112K, India=52K, Phillipines=39K, China=37K, Vietnam=31K)

Asian Indians in USA:

basically 1 out of 100 people is USA is an Asian Indian (defined as one of Indian origin => He could either be one who is born here, but has ancestors from India, or one who has been born in Indian, but is currently in USA).

Following wikipedia link gives useful info: http://en.wikipedia.org/wiki/Indian_American#Statistics_on_Indians_in_the_U.S.

Of these 2.9 million indians in USA, 1.7M are India born who either became naturalized citizens, permanent residents (0.5M) or just temporary residents on various student or work visas. Remaining 1.2M are USA born, who are USA citizens by birth.

As of 2012, There were total 13.3M permanent residents in USA, of which 0.5M were Indians (Mexico=3.3M, China=0.6M, Phillipines=0.6M). Also, there were 0.4M H1B Visa holders in USA of which 0.3M were Indians (China=50K, no ther country more than 5K)

Cities:

There are only 10 cities in USA with population > 1M (i.e 10 lakh people). In contrast, there are 50 cities in India with population > 1M

Link: https://en.wikipedia.org/wiki/List_of_United_States_cities_by_population

1M + : 10 cities

400K+ : 50 cities

200K+: 100 cities

100K+: 300 cities (of these about 70 are from california, 40 from texas and 20 from Florida. None of other states have more than 10 cities in top 300 cities)

About 50M lived in top 50 cities. Cities by themselves do not give an idea of size of that area, as any city area is fixed, so as people start moving into the city, the city expands, but the expanded areas become new cities. As the original city itself doesn't grow in area, it's population kind of maxes out after a while, and adjoining cities keep on taking extra influx of people. A better stat is MSA (metropolitan statistical area). It gives better picture how the city population and area is growing. Link below shows that just 5 MSA comprised of 50M people. Top 15 MSA comprised of over 100M people, while more than half of US population is in top 35 MSA. About 70% of population is in top 100 MSA, and 85% in all 383 MSA.

Link: https://en.wikipedia.org/wiki/List_of_metropolitan_statistical_areas

Historically, New York, Los Angeles and Chicago has always been the top 3 most populated cities as well as MSA in USA. These MSA comprise about 15% of USA population (while these top 3 cities comprise only about 5% of population, so we can see that MSA are more relevant). Area wise also these are huge MSA. Since top 100 MSA are where most of the high paying jobs and industries are, these are essentially where people mostly live. These are the MSA where housing prices matter, since these area are restricted by available space to build housing which is close by to work (within 30 min of commute time). Outside of these 100 MSA, house prices should pretty much be same as the cost to build house, since there's abundant land. Land as a percentage of house sale price is less than 10% for MSA which are not in top 100.

Employment:

Population and employment figures from year 2010: (taken from www.census.gov, and www.bls.gov)

USA population is 310M, out of which 155M are in the civilian non-farm workforce (1.5M are in military workforce, while 3M farm for a living. If we include total workforce is 160M). About 10M out of this civilian workforce is unemployed, so 145M people are employed. Simple calculation for population is that there are roughly 20M people in each age group of 5 year increment, starting from 0yrs upto the age of 60 yrs. So, population in 0-60yrs is 20M*60/5=240M ppl (In reality, it's 250M). Remaining 60M are over the age of 60 yrs. Population breakup by age is:

< 5yrs: 20M. Out of these, 6M goto some form of preschool.

5-17yrs: 54M. Out of these 55M are enrolled in kindergarten, elementary or high school (50M in public and 5M in private). So, all of the population is getting primary education. That is reflected in the workforce number, where 87% of the workforce has a high school degree. That implies, about 10% of these 55M kids drop out of high school or even before, without getting a high school degree. More details here: https://nces.ed.gov/programs/digest/d17/tables/dt17_105.20.asp?current=yes . Total student enrollment is 76M, of which 55M are in schools (38M in elementary/middle school, 16M in high school), 21M are in colleges (18M undergrads, and 3M grads). 14M high school kids are in this age group, while none of college kids are in this age group.

18-24yrs: 30M. Out of these, 14M are enrolled in high school or college (school=1.5M, undergrad/grad college=12.5M). So, more than half of this age group people are not getting any college education. Of the ones that are enrolled, half of them drop out without geting a 4 year degree. So, only 25% of the workforce has a 4 year college degree or higher, which comes close with the workforce numbers of 30% workforce having a 4 yr college degree . Note, many of the people in higher age group, also get a 4 yr college degree later in their life, so the workforce has a slightly higher number for people with 4 yr college degree. Also, out of the remaining 75%, about 2/3rd of them enter the workforce. So, out of 22M who don't complete college, about 15M get into workforce and start earning money.

25-59yrs: 145M. 8M of people here are still students in colleges. Most of the people in this group comprise the workforce of 155M. BLS figures show a partcipation rate of 85%, so about 115M of the workforce is comprised of this group. Looking at this number, only 20M (145M-8M-115M) of this age group is not employed. Some of them are stay at home mom/dad, some may be involved in farming, while some may be out of labor force all together because of disabilities, etc, while some are simply unemployed because no one is hiring them.

> 60yrs: 60M. about 25% of the people in this age group still work, implying about 15M of the workforce comes from this age group. Note that full retirement benefits (social security benefits) don't start until the age of 67yrs, so many people keep on working till age 65. In fact, in the age group of 60-65yrs, of a population of 17M, 11M keep on working. Remaining 4M of the workforce comes from people over age 65.

So, based on this, we see that abou 80% of the workforce of 155M comes from age group 25-60yrs, and only 30% of the workforce has a 4 yr college degree. Kids+students are about 100M, while old retired people are about 45M. Out of remaining 165M people who are eligible to work, 150M people are working (including military and farm jobs). Only 15M are not working (5M due to choice or disability, while 10M due to not able to find a job). One interesting fact is that females in colleges outnumber males (12M vs 9M).

Salary:

Now, lets see at the occupation of this workforce and their median salary. This is a good link at bls website: http://www.bls.gov/cps/cpsaat39.htm (NOTE: this only shows earnings for people making more than certain threshold/year, since for lower earnings, data may get unreliable). Unemployment rate for people with bachelor's or higher degree is very low (2.5% in 2017), while those who didn't complete high school was much higher at 13%.

Now, we look at what profession are these people employed in.

Highest paying occupations: about 17M people are in this group making > $100K/year. These are top 10% of working population. Highest paid jobs are doctors, lawyers and CEOs most of whom are in top 1%.

  1. Medical Professions: These include anyone working in Medical field, as doctors, nurses, therapists, etc. NOTE that doctors are the only ones in this field who make salaries in top 1%. Others make much lower salaries.
    • Doctors: Total 1M physicians, surgeons, dentists, pharmicists, dietician or related occupation. Doctors are the highest paid of any profession in USA. Median salary=$200K for salaried doctors, while self employed or those working in speciality fields earn about $400K in median salary. In fact, 9 of top 10 of the highest paying jobs in the USA are all in the field of health care profession (i.e doctors).
    • Therapists: 0.5M therapists, as speech therapist, physical therapist, respiratory therapist, etc. Median salary=$100K.
    • Nurses: 2.5M. Salary=$100K
    • Technologists, technicians, vocational nurses: 2M. Decent salary > $70K.
  2. CEOs: 1M CEOs, including those who have their own business. median salary = $200K. If we only look at large public or private companies, there might be only 20K CEOs, and their median salary is >$500K.
  3. Legal Professions: This includes lawyers and paralegals, as well as people who have their own law firm. They are usually very highly paid, and lawyers in top companies as well in good legal firms usually end up in top 1% of the population earning wise.
    • Lawyers: 1.2M lawyers (according to American Bar Association). Median salary=$200K.
    • Paralegal, legal assistants and legal support workers: Total=0.5M.
  4. Technology Profession: Here, we include all tech field profession mostly Engineers and computer programmers, etc. Salaries for these people is also pretty high, and they usually start in the top 10%-20% of earners, and by mid career are usually in top 3%-5% of earners.
    • Computers: 3M in the field of software programming, IT, DB, Web developer, etc.
    • Engineering: Total = 2M. Electrical engineers, Mechanical engineers and civil engineers are 0.3M each, while other fields as aerospace, chemical, nuclear, materials, industrial, etc comprise remaining 2M. Engineering jobs are the highest paid jobs coming out of college across all disciplines.
    • Engineering Technicians/drafters: 0.5M
  5. Life, physical, and social science: 1M. Surprisingly salaries are at par with engineering jobs, at about $100K. These mostly include phychologist, scientists, economists, Miscellaneous life, physical, and social science technicians, etc.
  6. Arts, design, entertainment, sports, and media occupations: 1.5M. Mostly includes artists, actors, writers, directors, dancers, sportsman, entertainers, photographers, media workers, etc. avg salary is about $100K.

Lowest paying occupations: about 15M people are in this group making < $40K/year ($20/hr *40 hrs/week *50 weeks = $40K). When you hear headlines of people losing jobs, these are the people who lose their jobs. So, unempoyment rate is mostly affected by people in this category. They are bottom 10% of working population.

  1. Agricultural/farm workers: Total=1M. lowest pay of all occupations at < $10/hr. Doesn't require any education. They usually work on farms of other people.
  2. Food preparation and serving related occupations: Total=4M. Mostly employed in small businesses, as waiters, cooks, attendants, etc.
  3. Personal care and service occupations: Total=2M. Mostly includes hair dressers, child care, animal trainers, fitness workers, etc.
  4. Building and grounds cleaning and maintenance occupations: Total=4M. Mostly includes janitors, maids, ground maintainence, etc. Very low pay at < $10/hr.
  5. Protective services: Total=1M (excludes govt employees as police, fire fighters, etc). Includes security guards, life guards, etc.
  6. Healthcare support occupations: Total=2M. Includes all support staff, assistants at hospitals, etc.

Middle paying occupations: remaining 120M people are in this group making $40K - $100K. These are the middle 80% of the working population and comprise everyone else. This is WIP? FIXME?

  1. Teachers: We include anyone in Teaching profession here. They are teaxhers in schools, 2 yr colleges, as well as professors in universities. Most of the professors in top universities get paid pretty well to be in the top 10% of population. Howver, they are still significantly under paid compared to their colleagues at private corporations.
    • Schools: 3.7M teachers in elementary/high schools (3.2M in public schools and 0.5M in private schools). Assuming 50M students in public schools, that's a ratio of 1:16 for teacher:student. For private schools, it's 0.5M teachers for 5M students implying a ratio of 1:10. About 100K public schools (there are about 14K public school district, meaning avg of 7 schools per ISD (independent school district) and 35K private schools. About $650B was spent in public schools in 2018, implying per student expenditure of $12K/year. If we add up private schools, about $1T is spent in schools every year.
    • Colleges: Assuming avg college fees of $25K/year, and 20M students, about $0.5T is spent in colleges every year.  There are about 3000 4 yr institutions, and 1700 2 year institutions. https://nces.ed.gov/fastfacts/display.asp?id=372.
  2. Misc: Many more professions here. I'll list some more common ones here later

 

 

 

Theatres in USA

Theatres in USA are very expensive. Average Ticket price is $8/person (incl tax). Tickets are cheaper for movies before 6PM. However, since this is a country, where deals abound, you can save atleast half the money while enjoying movies at these theatres. Many of these theatres put up Bollywood movies also, if there are significant number of Indians living in that area. There are dedicated Indian theatres also in some of the big cities like Dallas, Houston, Atlanta, etc. Most of the theatres are digital theatres, while there are some IMAX theatres too. If you are here, you should try a real IMAX theatre atleast once. There are lot of IMAX theatres, but the real ones are the ones with huge screens in a dedicated theatre. If you are seeing an IMAX in multiplex, it's not a real IMAX. The sad part is that these "IMAX certified" thatres end up charging you a lot of money, while giving you the experience of something just slightly better than a regular 3D experience. You can find more details of American movie theatres on this Wiki Link

Different Theatres

  1. Cinemark. Cinemark is the 2nd largest movie theatre chain in USA. They have Normal theatres, Digital and 3D theatres, as well as IMAX theatres. Their tickets are usually $8, but they have so called discount theatres, which offer you tickets for $1 or $2. The discount theatres are exactly the same as normal theatres, so there is nothing that you miss. Only catch is that these discount theatres do not have latest release, but movies which are atleast couple of months old. Cinemark tries to have atleast 1 discount theatre in big cities, so it's the cheapest way to watch movies anywhere in USA. These discount theatres are usually referred to as "Movies 6", "Movies 8", "Movies 10", "Movies 14", etc  or "dollar cinema" theatres on the cinemark website. Look through the "theatre and showtime" page on the website, to find a theatre near you. I'm listing some theatres below (movies 8, etc), which are "dollar" theatres (<$3/ticket). There are other "movies 14" etc. theatres also, which have slightly higher prices (<$6/ticket), but they have newer releases. You should not have to pay more than $6 for any movie show, since you will usually find these higher priced movie theatres in almost all cities with latest releases.
    • Austin, TX: Cinemark Movies 8 (Round Rock, TX) => PERMANENTLY CLOSED (as of 2021) regular movies = $2.50/ticket, 3D = $4.25/ticket (discounted to $3.75 on wednessdays), mostly 6 month old movies
    • Austin, TX: Cinemark Movies 14 (Round Rock, TX) => regular movies = $5.75/ticket, mostly newer movies
    • Dallas, TX: Cinemark Hollywood USA Movies 15 (Garland, TX) => regular movies = $2/ticket, 3D = $4/ticket (discounted on Tuesdays), mostly 6 month old movies
  2. AMC Theatres. AMC is the largest movie theatre chain in USA (almost twice the size of AMC). This theatre chain gives you the best value for money. They also have similar movie halls as Cinemark theatres. Although their normal movie charges are also about $8, but they charge $4 (some places they charge $5 or $6) for movies on Friday, Saturday and Sunday that start before 12PM noon. This is the cheapest you can watch movies at places where you don't have cinemark discount theatres.
  3. Bollywood Theatres: There are a lot of Bollywood theatres operated by Indians, which exclusivly show desi movies. However, these are only in big cities. This website is the best I was able to find, which lists all the bollywood cinemas in USA, as well as has links to all the bollywood movies that are released. However, most of the theatres charge $8/ticket. Some of these theatres have deals for 1 day in a week. Still too expensive, and not worth the money. Most of these movies you can watch online for free or at a very low cost. See "online movie serial" link on left.
  4. IMAX: IMAX theatres are the ones that are worth watching a movie outside. A decent projector (<$500) can give you an experience similar to what you get in regular movie theatres, but real IMAX theatres, give you an experience which is impossible to capture via a home projector. Typical home projector screens are 10ftx10ft=100 sq ft, which is just 5% of typical IMAX screen.

    Probably best to try the world's three largest IMAX screens:

    1. Sydney IMAX, Sydney, Australia - Held world record for 15 years and has recently been upgraded
    Dimensions: 97x117ft (29.7x35.7m) - 11,350sq. ft. , 1,060m2

    2. Melbourne IMAX, Melbourne, Australia - Used to have the world's largest 3D screen prior to Sydney upgrade
    Dimensions: 75x104ft (23x32m) - 7,800sq. ft, 736m2

    3. Prasad IMAX, Hyperabad, India - The world's busiest and 3rd largest screen
    Dimensions: 72x95ft (22x29m) - 6,840sq ft., 638m2

    To put these screens into perspective, most IMAX screens are 2,500sq ft. or less that less than 22% of the Sydney screen size

     

     


 

How to watch Hollywood movies for free in Theatres

Probably you have heard about movie screenings. These are the first shows of the movie that are shown to journalists, reporters and selected guests. This is from where these people get to write reviews about a movie, before it gets released to the mass public. But here in US, these movie screenings are available to the general public also. There are lot of ways you can find out about these free movie screenings. One is to ask the theatre, and see when they have it. Other is to look in newspapers. However, the best and the most reliable source is the wild about movies website. This link https://www.wildaboutmovies.com/free-movie-screenings/ takes you to movies that are available for free screening. Click on the movie you are interested and see if it is available in your city. Most of the big US cities are covered here. Fill in the form. You will get confirmation in email. Print your pass and goto the theatre on designated date. Remember that not everyone gets passes. Only a few selected random entries get confirmation email with a pass.

One thing to note is that seating is on a first come and first serve basis. The number of passes issued to general public are more than the number of seats. So, you have to go to the theatre atleast half an hour before the scheduled movie time. If the movie is a very hyped movie, you might have to go hours before the movie starts. You will have to stand in the queue. Don't be surprised if you see a long queue. Unless the theatre administrator comes and informs that NOT everyone will be admitted, you will most likely be admitted even if you are at the end of the queue. Come full, since popcorn/drinks are not cheap in theatres cry

 


 

Kids Summer Movies

A lot of theatres in USA have movie shows during the summer for very cheap. The movies are usually kids movies that are old. They are the first show during the day, when the theatres are anyway empty. Also, they avoid weekends, and have these shows on weekdays to minimize their losses. Very few theatres participate, so check on the website to see which theatre is closest to you. In spite of all of these limitations, it's a nice way to get kids to watch movies on the big screen for a dollar or two. AMC, Cinemark, Regal all have their own version of "Kids Summer Movie Club"

  1. Cinemark: They call it the "Summer Movie Clubhouse". For about 10 weeks in summer, they show a different movie every week. The movies are shown from Monday-Wednesday @10am or before.
    1. 2024 => June 10-Aug 15 (10 weeks). Link => https://www.cinemark.com/series-events-info-pages/summer-movie-clubhouse/

 

 

******************************************
For running synthesis in Cadence RC (RTL Compiler):
-------------------------------------------------------------------

RC does global opt which isolates timing critical and non-timing critical paths before mapping them to gates. This results in better design than tools which do local/incremental opt in which design is mapped to gates first and then timing is opt.

RC:
---
Create a dir: /db/NOZOMI_NEXT_OA/design1p0/HDL/RCompiler/digtop/

NOTE: everything in RC is stored in virtual dir starting at / . So, we see / after many of the cmd which specifies that the cmd applies to all of the design (/ implies the top level dir of design. It's NOT for continuation on next line)

cp .synth_init file from some other dir. It is similar to .synopsys_dc.setup and has search paths, lib path and other variables setup. RC searches for this file first in installation dir as master.synth_init file, then in home dir for .cadence/.synth_init file, and finally in current dir for .synth_init file. It has the following and many more settings:

#set_attribute <attr_name> <attr_value> <object> => sets value of an attribute. In RC, there are predefined attr associated with objects. We can set only those attr on objects, which are read-write. Also, some attr can only be set at root (/) level, while some can be set on "designs" objects only.
ex: set_attribute lp_clock_gating_exclude true /designs/digtop => setting attr on designs/digtop object

#we can also create our own attribute:
set_user_attribute <attr_name> <attr_value> <object>

#get_attribute  <attr_name> <object> => gets attr value on single object only.
ex: get_attr load /libraries/slow/inx1/A

#set library paths to max delay lib. When we set this attr, RC scans these .lib files and reports errors/warnings in these files such as usupported constructs, etc. It also reports unusable cells (marked as "dont_use" in these lib files. usually all CTS cells and dly cells are marked as dont_use). Then it sets attribute of root "/": library = PML30_W_150_1.65_CORE.lib PML30_W_150_1.65_CTS.lib
set_attribute lib_search_path {/db/pdkoa/lbc8/2011.06.26/diglib/pml30/synopsys/src} /
set_attribute library {"PML30_W_150_1.65_CORE.lib" "PML30_W_150_1.65_CTS.lib"} / => max library. library attr is a root attr and so it's applied at root dir. This cmd populates the /libraries virtual dir.

#WLM, PLE, spatial or Physical RC can be used for wire modeling. WLM is worst and Physical is best. WLM is default.
#RC-WLM: info in .lib file. has WLM models. look in liberty.txt for details. WLM provides same res/cap for all layers (which is Res=0, cap=1pf/unit_length). In reality, res=0.2ohm/um and cap=0.2ff/um for LBC7 process. so, WLM is overly optimistic for net delays, and effectively treats net delays as 0.
set attr interconnect_mode wireload /
set attr wireload_mode top /

#RC-PLE (physical layout estimation), RC-spatial, RC-physical(RCP): needs tech_lef and std_cell_lef files in addition to .lib files. cap_table and floorplan def files are optional for PLE and spatial, but floorplan .def file is required for physical as it has pin location, macro placement, etc. PLE does good job modeling local interconnects since physical cell size as well as various metal layer info is present. Providing cap table info gives better estimate of cap/res as actual cap/res taken for each layer. spatial models longer wires better, as it does coarse placement under the hood. providing floorplan def helps a lot in RC-spatial.

set attr interconnect_mode ple / => not needed as specifying lef files applies PLE.
#when setting attr for lef lib, RC scans these files and reports number of routing layers, number of logic/seq cells, and any warnings/errors etc. It alos looks for consistency b/w tech lef and cap table for width of layers, etc. Then it sets attr "lef_library", "cap_table" for root "/" to named files below.
set_attribute lef_library {"/db/pdk/lbc7/rev1/diglib/msl270/r3.0.0/vdio/lef/msl270_lbc7_core_iso_2pin.lef" "/db/pdk/lbc7/rev1/diglib/msl270/r3.0.0/vdio/lef/msl270_lbc7_tech_3layer.lef" } / => both tech and std cell lef files provided. stored in compiler memory at /libraries
set_attribute cap_table_file {/db/pdk/lbc7/rev1/diglib/msl270/r3.0.0/vdio/captabl/3lm_maxC_maxvia.capTbl} / => helpful. This shows res and cap for various width and spacing for each layer and vias.

For running spatial or physical, include it in "synthesize" cmd as follows when running rc:
synthesize -to_mapped -spatial -effort [low|medium|high] => spatial
synthesize -to_placed => physical. It runs First encounter (FE) placeDesign, trialroute, extractRC, buffers long wires, brings in physical timing and performs inc opt. Then we can do: write_encounter digtop. We can output a def file which is fully placed legal design pre-CTS. We can then start from the CTS step in FE.


##Default undriven/unconnected setting is 'none'.  These connect each i/p, o/p or internal undriven signal (wire/reg) to specified value. none implies undriven signal remains undriven. post elaboration netlist will have appr gates and assign stmt to support driven value.
#set_attribute hdl_unconnected_input_port_value 0 | 1 | x | none /
#set_attribute hdl_undriven_output_port_value   0 | 1 | x | none /
#set_attribute hdl_undriven_signal_value        0 | 1 | x | none /

#naming style in verilog netlist generated. %s is variable name, %d is individual bit
set_attribute hdl_array_naming_style %s_%d /  
set_attribute bus_naming_style %s_%d /

#Selects the Verilog style for unconnected instance pins. default is to write out dummy wires for unconnected instance pins. ex: for this line in original RTL: DELAY1 DL (.A(A2)); //DL module has 1 i/p port and 1 o/p port which is not coded in RTL.
#full => Put UNCONNECTED for nets connecting unconnected instance pins in gate netlist. ex: DELAY1 DL(.A (A2), .Z (UNCONNECTED));
#partial => Put the unconnected instance pins in gate netlist, but no wire to connect to it. ex: DELAY1 DL(.A (A2), .Z ());
#none => do nothing. ex: DELAY1 DL (.A(A2));
set_attribute write_vlog_unconnected_port_style  partial / => remove  UNCONNECTED nets from pins.

#set_attribute tns_opto true / => turn ON TNS
 
##set_attribute wireload_mode <value> /
set_attribute information_level 7 /

set_attribute hdl_track_filename_row_col true / => To include the RTL file name and line number  at  which  the  DFT violation occurred in the messages produced by check_dft_rules

#clk gating set for 3 or more flops
set_attribute lp_insert_clock_gating true /
set_attribute lp_clock_gating_min_flops 3 /
set_attribute lp_clock_gating_prefix CLK_GATE /

#do not merge equiv flops and latches
set_attribute optimize_merge_flops false /
set_attribute optimize_merge_latches false /

#optimize const flops. By default, set to true so that const 0/1 can be propagated thru flops, thus allowing removal of flops.
#set_attr optimize_constant_0_flops false
#set_attr optimize_constant_1_flops false

#use_tiehilo_for_const: const are tied to hi/lo cells. This doesn't connect all 1'b1/1'b0 to tiehi/lo cells , so we use another cmd after synthesize to fix remaining 1'b1/1'b0 problem. options:
#duplicate => Allows each constant assignment to be replaced with a tie cell.
#unique => Allows  only  one unique tie cell in the netlist. Treatment of the remaining constant assignments depends on settings of the remove_assigns and set_remove_assign_options
#none => Prevents the  replacement  of constants in the netlist with tie cells
set_attr use_tiehilo_for_const unique => only 1 unique tie cell should be added.

vaious other attr can be set in .synth_init file, before running rc cmds.

------------------
run RC: script run_rc
rc -10.1-s202 -over -f ./tcl/top.tcl -logfile ./logs/top.log -cmdfile ./logs/top.cmd

#IMP: for getting help with cmds on rc,
rc:/> cdnshelp => brings up cdns help browser for that rev of tool
rc:/> man or help <cmd_name>. Tab key shows all possible completions.
rc:/> man lib_serach_path => this will show man page for attr "lib_serach_path"

# write_template => template script can be generated by running write_template with various options
write_template -outfile run.tcl -full => creates script with all basic cmd, dft, power, retiming. -simple creates a simple script.

#running scripts within RC: do a source or include with script file name.

top.tcl:
-------
#initial setup: (it has set SCAN_EXISTS 0 => choose b/w scan vs non-scan design)
#include/source other files
include tcl/setup.tcl => set varaibles as DESIGN, SYN_EFF, lib path, dir, etc. All lib path, cap_table etc are put in .synth_init file, but can also be put here.
#source tcl/setup.tcl => we can also use source to include the file

#source tcl/analyze.tcl
#read verilog/vhdl/systemVerilog files, elaborate, check design, uniqify and then check for uniquufy
#read_hdl <-v1995 | -v2001 | -sv | -vhdl> [list "$RTL_DIR/global.v"  ... " " ] => default lang attr is one specified by hdl_language  attribute.  The  default value for the hdl_language attribute is -v1995. For -vhdl, hdl_vhdl_read_version root attribute apecifies vhdl version, by default it's set to VHDL-1993.
read_hdl -v2001 [list "$RTL_DIR/global.v"  ... "$RTL_DIR/digtop.v" ]

#read_netlist design_struct.v => to read gate level netlist

elaborate $DIG_TOP_LEVEL => $DIG_TOP_LEVEL is set to digtop above. This elaborates top level design and all its references. We only specify the top level. It builds data structures, infers registers,performs HDL opt, identifies clk gating and operand isolation candidates.

check_design -unresolved => checks for design problems as unresolved references. Using -all checks for  undriven/multidriven ports/pins, unloaded ports/pins, constant connected ports/pins and any assign stmt.

#uniquify not needed as design is uniquified by default.
/*
uniquify $DIG_TOP_LEVEL
#task to make sure design is uniquified
proc is_design_uniquified {} {
    foreach subd [find /des*/* -subdesign *] { => look in designs dir for all sub designs
        if {[llength [get_attr instance $subd]] > 1 } {
            puts "ERROR: design is NOT uniquified"
            return
        } else { return "design is uniquified" }
    }
}
is_design_uniquified => calling the actual procedure
*/

#provide constraints in SDC: 2 options: read sdc file directly by using read_sdc or enter constraints as in DC. eg.
#option 1: read_sdc ./tcl/env_constraints.tcl => reads all DC sdc cmds directly without any prefixing. Useful as same file can be used in EDI/Dc, etc. IMP: we've to add ./tcl and not tcl/, since virtual dir structure is assumed for RC, so it looks for tcl dir in virtual dir, which is not there, so it complains. By changing it to ./tcl, it looks in unix tcl dir in current dir
#option 2: replace all dc cmds with dc::, or change them to RC equiv cmd. ex: dc::set_load ..... We can read these cmds anytime within RC shell or put it in file and source it: source tcl/env_constraints.tcl. However, same file can't be used in synopsys tools as "dc::" is not sdc cmd.

#env constraints: (see in sdc.txt for cmd details: some cmds in DC sdc file aren't std sdc cmd, so they have to be replaced with appr RC cmds).
option 1: read_sdc ./tcl/env_constraints.tcl => same file can be used in EDI
option 2: prepend sdc cmds with dc::.

env_constraints.tcl file: op_cond (PVT), load (both i/p and o/p), drive (only on i/p), fanout(only on o/p) and WLM. Of these, op_cond and WLM are already specified in .synth_init file. dont_touch, dont_use directives also provided here.
------
#i/p driver: use "set_driving_cell" as it's std sdc cmd
#set_attribute external_driver [find [find "MSL270_W_125_2.5_CORE.db" -libcell IV110] -libpin Y] [all_inputs] => DC cmd
set_driving_cell -lib_cell IV110 [all_inputs] => sdc cmd. use this for both RC/DC

#o/p load: use "set_load" as it's std sdc cmd. However, to automatically use i/p cap for IV110 as load cap for o/p ports, we need to use diff cmd in DC vs RC. Then we can use set_load.
if {$RUN_PNR ==1} {
set output_load 0.005
} else {
#set output_load [get_attribute capacitance "MSL270_W_125_2.5_CORE.db/IV110/A"] => get_attribute is native cmd for both RC/DC with different syntax, so it gives an error in RC. Also, it can't be used in EDI. For RC, we use "get_liberty_attribute" which is simpler.
set output_load [get_liberty_attribute capacitance [find [find "MSL270_W_125_2.5_CORE.db" -libcell IV110] -libpin A]] => get_liberty_attribute isn't supported in EDI. use this in RC only.
#set output_load  [get_attribute max_capacitance [find [find / -libcell MSL270_W_125_2.5_CORE/IV110] -libpin A]] => here get_attribute is used and full path of libcell is provided since we start search from top level virtual dir "/".
}

set output_load_4x [expr 4 * $output_load]
set_load -pin_load $output_load_4x [all_outputs]

write_set_load > ${_OUTPUTS_PATH}/net_cap.txt => shows load values for all the nets in design in set_load format. since set_load is sdc cmd, values are shown in pf. Run this in RC to make sure units are correctly shown.

#set_dont_use
read_sdc ./tcl/dont_use.tcl

#set_dont_touch
read_sdc ./tcl/dont_touch.tcl

#write out HDL in cadence primitives, before doing synthesis
write_hdl    > ./netlist/${DESIGN}.PreSyn.v

#initial synthesis
synthesize -to_generic -eff low -no_incr => opt mux and datapath and stops before mapping. It contains tech independent components. It does const propagation, resource sharing, logic speculation, mux opt, CSA (carry save adder) opt. -no_incr allows it to opt logic from scratch.
synthesize -to_mapped  -eff low -no_incr => maps design to cells in tech lib and optimizes it. It evaluates every cell in design and resizes to improve area and power. If -incr option is used, then it runs DRC, timing, area cleanup and critical region resynthesis to meet timing. -incr preserves current impl and performs opt only if there is an improvement in overall cost of design. -to_mapped is default option.

#when we synthesize with map, we see "global mapping target info" on screen and in log file. In each cost group, RC will estimate a target slack number based on the design structure, libraries, and design constraints. This slack number is the estimated slack on the worst path of a cost group seen before mapping. During mapping, RC will try to structure logic, and select cells to bring this target slack number close to 0.

#puts "Runtime & Memory after initial synthesize"
#timestat MAPPED

generate_reports -outdir $_REPORTS_PATH -tag ${DESIGN}.initial => reports area, gate, timing in separate files.
#report area > $_REPORTS_PATH/${DESIGN}.initial_area.rpt => no need of this cmd, as area already reported by above cmd

write_hdl  > ${_NETLIST_PATH}/${DESIGN}_initial.v

#### design constraints => case_analysis, i/p,o/p delays, clocks/generated clocks, false/multicycle paths
if {$SCAN_EXISTS} {
read_sdc ./tcl/case_analysis.tcl => set_case_analysis only if scan exists to force part in functional mode. We want to have simple functional timing paths, and not have paths for scan_mode too. strictly speaking, this stmt is not required.
#case_analysis.tcl
#set_case_analysis 0 scan_mode_in => force scan_mode to 0 so that we see timimg paths b/w diff clocks. We are not interested in timing when part is in scan mode.
}
read_sdc ./tcl/constraints.tcl => has i/p, o/p delays
#constraints.tcl
set_input_delay  0.2 -clock clk1 [all_inputs]
set_output_delay 0.4 -clock clk1 [all_outputs]
}

#clocks (set_drive and create_clock/create_generated_clock for all clks).
read_sdc ./tcl/clocks.tcl

#we don't set uncertainty in clocks.tcl, since we use that file in EDI, where we want to use real clk delays)
set_clock_uncertainty $SPI_SCK_skew SPI_SCK

#turn off clk gating if not wanted (in .synth_init we set clk gating to true)
set_attribute lp_insert_clock_gating false /

#read false_paths/multi-cycle paths
read_sdc ./tcl/false_paths.tcl
read_sdc ./tcl/multicycle_paths.tcl

#to prevent any logic changes on instances of specified cells.
#map_size_ok => Allows  resizing, unmapping, and remapping of a mapped sequential inst during opt,  but not renaming or deleting it.
#size_ok     => Allows resizing a mapped inst during  opt, but not deleting, renaming, or remapping it.
    
set_attr preserve map_size_ok [find I_S1_CONTROL -instance  instances_seq/sm_reg*]
#set_attr preserve true => Prevents logic changes to any object in the design during opt. needed

# Incremental Compile with high effort
source tcl/compile.tcl

###compile.tcl has following cmds.
#report worst case timing by setting this variable:
set_attribute map_timing true /

## Define cost groups (clock-clock, clock-output, input-clock, input-output)
if {[llength [all::all_seqs]] > 0} {
  define_cost_group -name I2C -design $DESIGN
  define_cost_group -name C2O -design $DESIGN
  define_cost_group -name C2C -design $DESIGN
  path_group -from [all::all_seqs] -to [all::all_seqs] -group C2C -name C2C
  path_group -from [all::all_seqs] -to [all::all_outs] -group C2O -name C2O
  path_group -from [all::all_inps]  -to [all::all_seqs] -group I2C -name I2C
}

define_cost_group -name I2O -design $DESIGN
path_group -from [all::all_inps]  -to [all::all_outs] -group I2O -name I2O

#report all failed cmds when reading sdc
echo "failed sdc cmds" > $_REPORTS_PATH/${DESIGN}.after_constrain.rpt
echo $::dc::sdc_failed_commands >> $_REPORTS_PATH/${DESIGN}.after_constrain.rpt

echo "The number of exceptions is [llength [find /designs/$DESIGN -exception *]]" >> $_REPORTS_PATH/${DESIGN}.after_constrain.rpt

report timing -lint -verbose >> $_REPORTS_PATH/${DESIGN}.after_constrain.rpt => reports possible timing problems in the design, such as ports that have no external delays (unclocked primary I/O), unclocked flops, multiple clocks propagating to the same clock pin, timing exceptions that cannot be satisfied, timing exceptions overwriting other timing exceptions, constraints that may have no impact on the design, and so on.

#incremental synthesis
synthesize -to_mapped -eff high -incr

#IMP: we might have 1'b0 and 1'b1 in logic at this time. To connect them to tiehi/tielo cells, run this:
insert_tiehilo -all -hilo TO020L -verbose [find -design *] => for both hi/lo connections, same cell used. verbose shows info on screen, as to which 1'b1/1'b0 are still not tied. -all does it for all including scan cells. If we put "-hi TO020 -lo TO020", then tool connects hi connections to one instance of TO020 (to HI pin. LO pin is left floating) and lo connections to another instance of TO020 (to LO pin. HI pin is left floating). So, this results in 2 copies of TO020 cells. By using "-hilo TO020", we use same instance for hi and lo connections.

#reports
generate_reports -outdir $_REPORTS_PATH -tag ${DESIGN}.incremental
summary_table -outdir $_REPORTS_PATH

report timing  -num_paths 500 >> $_REPORTS_PATH/${DESIGN}.all_timing.rpt
foreach cg [find / -cost_group -null_ok *] {
  report timing -cost_group [list $cg] -num_paths 100 > $_REPORTS_PATH/${DESIGN}.[basename $cg]_timing.rpt
}

report area > $_REPORTS_PATH/${DESIGN}.compile.rpt
report design_rules >> $_REPORTS_PATH/${DESIGN}.compile.rpt
report summary >> $_REPORTS_PATH/${DESIGN}.compile.rpt => reports area, timing and design rules.

#optional reports
report messages >> $_REPORTS_PATH/${DESIGN}.compile.rpt => reports summary of error msg
report qor     >> $_REPORTS_PATH/${DESIGN}.compile.rpt
report gates -power >> $_REPORTS_PATH/${DESIGN}.compile.rpt => reports libcells used, total area and instance count
report clock_gating >> $_REPORTS_PATH/${DESIGN}.compile.rpt
report power -depth 0 >> $_REPORTS_PATH/${DESIGN}.compile.rpt
report datapath >> $_REPORTS_PATH/${DESIGN}.compile.rpt => datapath resource report

#write results
write_design -basename ${_OUTPUTS_PATH}/${DESIGN}
write_script > ${_OUTPUTS_PATH}/${DESIGN}.script
write_hdl  > ${_NETLIST_PATH}/${DESIGN}.v => final non-scan netlist

####### Insert Scan
if {$SCAN_EXISTS} { => see synthesis_DC.txt for details on this
set_ideal_network [get_ports scan_en_in]
set_false_path -from scan_en_in

source tcl/insert_dft.tcl
}

#insert_dft.tcl has following
source ./tcl/scan_constraints.tcl

#scan_constraints has following:
set_attribute dft_dont_scan true [ list Idigcore/IResetGen/nReset_meta1_reg \
                                        Idigcore/IResetGen/nReset_meta2_reg ]

set_attr dft_scan_style muxed_scan / => mux_scan style
set_attribute dft_prefix DFT_ / => prefix dft with DFT_

# For VDIO customers, it is recommended to set the value of the next two attributes to false.
set_attribute dft_identify_top_level_test_clocks false /
set_attribute dft_identify_test_signals false /

set_attribute dft_identify_internal_test_clocks false /
set_attribute use_scan_seqs_for_non_dft false /

set_attribute dft_scan_map_mode tdrc_pass "/designs/$DESIGN"
set_attribute dft_connect_shift_enable_during_mapping tie_off "/designs/$DESIGN"
set_attribute dft_connect_scan_data_pins_during_mapping loopback "/designs/$DESIGN"
set_attribute dft_scan_output_preference auto "/designs/$DESIGN"
set_attribute dft_lockup_element_type preferred_level_sensitive "/designs/$DESIGN"
#set_attribute dft_mix_clock_edges_in_scan_chains true "/designs/$DESIGN"

---
### define clocks, async set/reset, SDI, SDO, SCAN_EN and SCAN_MODE.
##all dft cmds have these common options:
#define_dft <test_mode | test_clock | shift_enable | scan_chain> -name <testObject> <port or pin name> -create_port -hookup_pin <pin_name> -hookup_polarity <inverted|non_inverted> -shared_in -shared_out

#<port or pin name>: we provide the driving port_or_pin_name. However, that will work only if we code the RTL in a way where the top level port can directly be used as SE, SCLK, SDI, SDO. In many cases, functional pins are used as scan pins by multiplexing them, so if we directly use the port name, that will be incorrect. For ex spi_cs_n being used as scan_shift_en (during scan_mode) has spi_cs_n anded with scan_mode to generate scan_shift_en which is then connected to SE pin of all flops. In this case, internal scan_shift_en needs to be used for SE, so we add option "-hookup_pin B/scan_shift_en_int" so that tool connects this pin to SE of all flops. When you specify this option, the RC-DFT engine does not validate the controllability of any logic between the top-level test-mode signal and its designated hookup pin under test-mode setup (i.e if the hookup pin can be changed to desired value by toggling i/p port or not). The way RTL is coded in our group is we get the pin driven out and then driven back in as dedicated pin for scan purpose (for ex scan_enable_out and scan_enable_in pins). Then we don't need -hookup_pin option. Look in DFT compiler notes (pg 1 back).

#-shared_in is used to indicate that i/p port is used for functional port also. similarly -shared_out is used to indicate that o/p port is used for functional port also. By default, the signal applied to the specified driving pin or port is considered to be a dedicated test signal. By specifying these, we ensure that these test signals will not get constrained in the write_do_lec dofile. Not specifying this option for a shared test signal will result in overconstraining the write_do_lec dofile (by forcing that input port to inactive state) which can lead to false EQs.

#-no_ideal marks the test signal as non-ideal which allows buffering in RC. By default, it's treated as ideal.

----
#force pins for test mode: i.e async set/reset need to be in inactive state, while SCAN_MODE needs to be high.
#define_dft test_mode -name <testModeObject> -active <high|low> -no_ideal -scan_shift <port_or_pin_name> [-create_port] [-shared_in] -hookup_pin <pin_name> -hookup_polarity <inverted|non_inverted>
define_dft test_mode -name scan_mode -active high scan_mode_in
#define_dft test_mode -name scan_reset -active high n_reset => we don't define async set/reset as we force them to 0, when scan_mode=1 (in RTL itself). If we need to toggle n_reset during scan test to have more coverage, then we need to use -scan_shift option which holds the scan signal to its test-mode active value during the scan shift operation of the tester cycle, but is otherwise allowed to pulse during capture cycle (test signal will be treated as a non-scan clock signal by the ATPG tool). -scan_shift option is also needed to generate correct lec.do file, else n_reset pin will get get constrained which will lead to false EQs.

#now define scan_clk, scan_shift_en, scan_data_in and scan_data_out for each chain. Note that these scan_pins are multiplexed with normal functional pins, so -hoopup_pin option is used.
#define_dft test_clock -name <testClockObject> -domain <testClockDomain> -period <delay in pico sec, default 50000> -rise <integer> -fall <integer> <portOrpin> -hookup_pin <pin_name> -controllable => Defines  a  test  clock  and  associates a test clock waveform with the clock. If  you  do  not define test clocks, the DFT rule checker automatically analyzes the test clocks and creates these objects with a default waveform. -hookup_pin specifies the core-side hookup pin to be used for the top-level test clock during DFT synthesis.
#-controllable => when specifying an internal pin for a test clock, this option indicates that the internal clock pin is controllable in test mode (for example, Built-in-Self-Test (BIST)). If you do not specify this option, the rule checker must be able to trace back from the internal pin to a controllable top-level clock pin. If you specify an internal pin as being controllable, you need to ensure that this pin can be controlled for the duration of the test cycle. The tool will not validate your assumption.
#-domain => pecifies the DFT clock domain associated with the test clock.Clocks belonging to the same domain can be mixed in a chain. If you omit this option, a new DFT clock domain is created and associated with the test clock. Flip-flops belonging to different test clocks in the same domain can be mixed in a chain. Lockup elements can be added between the flip-flops belonging to different test clocks.

define_dft test_clock -name scan_clk -domain scan_clk -period 100000 -rise 40 -fall 80 SCLK => scan_clk defined at port SCLK with period of 100ns (10 Mhz). rise happens at 40% from start of clk period while fall happens at 80%. So, rise happens at 40ns, while fall happens at 80 ns, assuming clk starts at 0ns. This test clk can be referred to as scan_clk from now on (name is helpful to search for the test clk, or look it in reports, etc). We don't specify hookup_pin as in RTL, we force the i/p clk pin to goto all flops in scan_mode (by using mux).

#define_dft shift_enable -name <shiftEnableObject> -active <high|low> <portOrpin_name> -hookup_pin <pin_name> [-create_port] => It specifies name and active value for shift_en signal. Active value is propagated during dft rule checking. The input signal can be defined on a top-level port or an internal driving pin. hookup_pin is internal pin which is the actual scan_en that should goto all flops.
define_dft shift_enable -name scan_enable  -active high SCAN_EN_IN => SCAN_EN_IN is defined as shift_enable and referred to as "scan_enable". In this RTL is coded so that scan_en_out comes back in as input port with name SCAN_EN_IN, so no need of hookup_pin.

#define_dft scan_chain -name <ChainName> -sdi <topLeveLSDIPort> -sdo <topLevelSDOPort> [-hookup_pin_sdi <coreSideSDIDrivingPin>] [-hookup_pin_sdo <coreSideSDOLoadPin>] [-shift_enable <ShiftEnableObject>] [-shared_output | -non_shared_output] [-terminal_lockup <level | edge>] => -hookup_pin_sdi/sdo specs core side hookup pin to be used for the scan data input/output signal during scan chain connection. -shift_enable designates chain specific SE signal, else default shift_enable signal used. -shared_output specs that a mux be inserted in the scan data path by the connect_scan_chains cmd since functional o/p port is being used as SDO port.

define_dft scan_chain -name chain1 -sdi spi_mosi  -sdo spi_miso -shared_output => sdi and sdo defined

###end of scan_constraints.tcl file

# DFT DRC Checking
check_dft_rules       > $_REPORTS_PATH/${DESIGN}_dft.rpt => look at hdl_track_filename_row_col attr.

report dft_registers >> $_REPORTS_PATH/${DESIGN}_dft.rpt
report dft_setup     >> $_REPORTS_PATH/${DESIGN}_dft.rpt

check_design -multidriven
check_dft_rules -advanced                                     >> $_REPORTS_PATH/${DESIGN}_dft.rpt
report dft_violations -tristate -xsource -xsource_by_instance >> $_REPORTS_PATH/${DESIGN}_dft.rpt

#fix dft violations before proceeding (either by modifying RTL or using auto fixing)
fix_dft_violations

# To turn off sequential merging on the design uncomment & use the following attributes.
set_attribute optimize_merge_flops false /
set_attribute optimize_merge_latches false /

#synthesize to map regular FF to scan FF (define_dft above makes forces synthesize cmd to include scan FF instead of non-scan FF. There is no separate scan option to synthesize with scan
synthesize -to_map -no_incr -auto_identify_shift_register => shift reg auto identified so that they are not replaced by scan cells

#Build the full scan chanins.
connect_scan_chains -preview => It shows how scan chain will be connected but makes no changes yet to the netlist.  
connect_scan_chains -auto_create_chain => connects scan FF which pass DFT into scan_chain. -auto_create_chain option allows the tool to create more chains, if needed, than what has been specified thru define_dft cmd.
report dft_chains > $_REPORTS_PATH/${DESIGN}_SCAN_Chain.txt

delete_unloaded_undriven -force_bit_blast -all digtop => remove unconnected ports in the design
set_attribute remove_assigns true => remove assigns & insert tiehilo cells during Incremental synthesis
set_attribute use_tiehilo_for_const duplicate

#incremental synthesis only if needed
#synthesize -to_mapped -eff low -incr

#IMP: we might have 1'b0 and 1'b1 in logic after scan synth. To connect them to tiehi/tielo cells, run this:
insert_tiehilo -all -hilo TO020L -verbose [find -design *]

#reports after scan insertion
report dft_setup > $_REPORTS_PATH/${DESIGN}-DFTsetup_final
write_scandef > ${DESIGN}-scanDEF
#write_atpg [-stil|mentor|cadence] > ${DESIGN}-ATPG
write_atpg -stil > ${DESIGN}-ATPG
write_dft_abstract_model > ${DESIGN}-scanAbstract
write_hdl -abstract > ${DESIGN}-logicAbstract
write_script -analyze_all_scan_chains > ${DESIGN}-writeScript-analyzeAllScanChains
## check_atpg_rules -library <Verilog simulation library files> -compression -directory <Encounter Test workdir directory>
## write_et_bsv -library <Verilog structural library files> -directory $ET_WORKDIR
## write_et_mbist -library <Verilog structural library files> -directory $ET_WORKDIR -bsv  -mbist_interface_file_di
r <string> -mbist_interface_file_list <string>
## write_et_atpg -library <Verilog structural library files> -compression -directory $ET_WORKDIR
write_et_atpg -library  /db/pdk/lbc7/rev1/diglib/msl270/r3.0.0/verilog/models/*.v  -directory $ET_WORKDIR

#final reports
generate_reports -outdir $_REPORTS_PATH -tag ${DESIGN}.scan
summary_table -outdir $_REPORTS_PATH

report timing  -num_paths 500 >> $_REPORTS_PATH/${DESIGN}.all_timing.scan.rpt
foreach cg [find / -cost_group -null_ok *] {
  report timing -cost_group [list $cg] -num_paths 100 > $_REPORTS_PATH/${DESIGN}_scan.[basename $cg]_timing.rpt
}

report area > $_REPORTS_PATH/${DESIGN}.scan.compile.rpt
report design_rules >> $_REPORTS_PATH/${DESIGN}.scan.compile.rpt
report summary >> $_REPORTS_PATH/${DESIGN}.scan.compile.rpt => reports area, timing and design rules.

#optional reports
report messages > $_REPORTS_PATH/${DESIGN}.scan.compile.rpt
report qor >> $_REPORTS_PATH/${DESIGN}.scan.compile.rpt
report gates -power >> $_REPORTS_PATH/${DESIGN}.scan.compile.rpt
report clock_gating >> $_REPORTS_PATH/${DESIGN}.scan.compile.rpt
report power -depth 0 >> $_REPORTS_PATH/${DESIGN}.scan.compile.rpt
report datapath > $_REPORTS_PATH/${DESIGN}.scan.compile.rpt

write_design -basename ${_OUTPUTS_PATH}/${DESIGN}_scan
write_script > ${_OUTPUTS_PATH}/${DESIGN}_scan.script
write_hdl  > ${_NETLIST_PATH}/${DESIGN}_scan.v => final scan netlist

-- end of insert_dft.tcl

#write sdc and do files
write_sdc > sdc/constraints.sdc

#Write do file for RTL is to be compared with the final netlist. only revised is specified since RTL is taken as golden. Otherwise we need to specify "-golden_design <RTL_files>"
if {$SCAN_EXISTS} {
write_do_lec -revised_design ${_NETLIST_PATH}/${DESIGN}_scan.v -logfile ${_LOG_PATH}/rtl2final.lec.log > ${_OUTPUTS_PATH}/rtl2final.lec.do
write_et_atpg -library /db/pdkoa/1533c035/current/diglib/pml48/verilog/models => write Encounter Test ATPG scripts in et_scripts dir to generate patterns
} else {
write_do_lec -revised_design ${_NETLIST_PATH}/${DESIGN}.v -logfile ${_LOG_PATH}/rtl2final.lec.log > ${_OUTPUTS_PATH}/rtl2final.lec.do
}

puts "Final Runtime & Memory."
timestat FINAL
puts "============================"
puts "Synthesis Finished ........."
puts "============================"

#################################
#for scan mapping, use this section
#################################
define_dft test_mode -shared_in -active high $TESTSCANMODE
set_attribute dft_dont_scan true [find / -inst I_WRAPPER/scanmode_r*]
set_attribute dft_dont_scan true [find / -inst I_WRAPPER/clked_nt_result*]

define_dft shift_enable  -name SE \
                         -active high \
                         -hookup_pin [find / -pin I_WRAPPER/SCANEN]\
                         [find / -port I_GPIO_Y[1]]
define_dft test_clock    -name SCANCLOCK \
                         -period 100000 -fall 40 -rise 60 \
                         [find / -port I_GPIO_Y[0]]
#define_dft test_mode     -scan_shift -name RESET -active high \
#                         [find / -port I_XRESET]

define_dft scan_chain    -name chain1 \
                         -sdi [find / -port I_GPIO_Y[2]] \
                         -sdo [find / -port O_GPIO_A[3]] \
                         -hookup_pin_sdi [find / -pin I_WRAPPER/SI1] \
                         -hookup_pin_sdo [find / -pin I_WRAPPER/SO1] \
                         -shared_out

define_dft scan_chain    -name chain2 \
                         -sdi [find / -port I_GPIO_Y[4]] \
                         -sdo [find / -port O_GPIO_A[5]] \
                         -hookup_pin_sdi [find / -pin I_WRAPPER/SI2] \
                         -hookup_pin_sdo [find / -pin I_WRAPPER/SO2] \
                         -shared_out


set_attribute dft_min_number_of_scan_chains 2 [find / -design $DIGTOPLEVEL]
#set_attribute dft_mix_clock_edges_in_scan_chains true [find / -design $DIGTOPLEVEL]
################################################################################
## dft_drc is used instead of check_test command
################################################################################
check_dft_rules > ./reports/check_dft_rules.rpt

############################################33



Scan mapping: converting flip-flops that pass TDRC.
Scan mapping: bypassed.  You have to either
1) set attribute 'dft_scan_map_mode' to 'tdrc_pass' and run 'check_dft_rules' or
2) set attribute 'dft_scan_map_mode' to 'force_all'.

Scan mapping bypassed because no TDRC data is available: either command 'check_dft_rules' has not been run or TDRC data has been subsequently invalidated.

#for scan
connect_scan_chains

---------------------------------------------------------------------------

For synthesis which involves multiple power domains:
----------

read_power_intent -module TOP -cpf "../TOP.cpf"
redirect chk.cpf.detailed.rpt "check_cpf -detail"
commit_power_intent
verify_power_structure -lp_only -pre_synthesis -detail > $_REPORTS_PATH/digtop_verify_power.rpt

write_cpf -output_dir ${_OUTPUTS_PATH} -prefix ${DESIGN}_
write_power_intent -base_name ${_OUTPUTS_PATH}/TOP_m -cpf -design TOP