ARM profile:

Starting in early 2000, ARM decided to diversify its product portfolio to cater to different segments of market. It developed architecture version 7 (called as v7), and defined 3 profiles, each of which was to cater to different segment of market. These became the 3 ARM profiles: A=Application profile, R=Realtime profile and M=Microcontroller profile, targeting different market segments. It branded these family of processors in these 3 profiles as "cortex" processors. Earlier arch version before v7 was v6 which was used in ARM11 family of processors.

ARM's very first cortex core was 32 bit Cortex-M3, introduced in 2004. It's a microcontroller core (M). It's for embedded use in microcontrollers. It was based on v7-M arch. Cortex-M0 and Cortex-M1 were designed later with fewest instruction set possible for the Cortex family, to become the smallest silicon die (Cortex-M0 core can be designed in less than 10K gates, where gate refers to 2 i/p NAND gate, which is very impressive. In contrast, modern x86 processors have billions of gates). M0 and M1 were based on older v6-M arch, which evolved from v6 arch. These are the only 2 cortex processors from v6 arch, rest of the cortex processors are from arch v7 and above.

Then in 2005, it came up with 32 bit Application core (A), known as Cortex-A8. It was basically a full blown processor core for use in high performing SOC. The Cortex-A8 was the first Cortex design to be adopted on a large scale in consumer devices. In 2012, it introduced 1st 64 bit cores. It introduced the powerful Cortex-A57 core, and the energy efficient alternative Cortex-A53 core.

In 2011, it introduced Cortex real time core (R), known as Cortex-R5. These are optimized for hard realtime and safety critical applications. It's similar to A profile, but adds features which make it more fault tolerant.

 M profile is 32 bit, and is the most popular core present in billions of embedded devices. 64 bit A profile is most popular in consumer hand held devices as phones, tablets, wearables, etc.

These are the 3 profiles:

1. Application profile     (A): Cortex A5, A8, A9, A15, A32, A53 thru A77 series used for complex OS and user app. It is the only one to support 64 bit ISA. A5, A8, A9, A15, A32 are 32 bit, while A53 onwards are 64 bit. Around late 2000, more and more applications were developed for 64 bit processors from Intel/AMD, and ARM had to move to 64 bit. With 64 bit, ARM moved to newer v8 architecture. All these A profiles support virtual memory system arch (VMSA) based on memory management unit (MMU). This is essential, as some OS require presence of MMU in order to work. These 64 bit ARM processors are the ones that are getting used in most of the SOC chips that you see used in phones, watches, handheld, etc. These easily run over 1GHz clk frequency. For ex, Raspberry Pi Broadcom SOC has A53 in Pi 3, and A72 in Pi 4. Many companies now prefer to design their own cpu based on v8-A arch by licensing arch, instead of licensing RTL for Cortex A cores. This is done to differentiate their products with others, as anyone using a standard cortex core from ARM can't be much better than the competitor using the same cortex ARM core. For ex, the SOCs in earliest ipad and iphones, used Cortex A8 and A9 cores from ARM, but starting with iPhone5, Apple started designing their own cores, based on ARM v7-A arch, which was called "Swift" (it had 2 ARM cores). In iphone 5S and later ipad Air and Mini, Apple designed in house 2 core processor called "Cyclone" based on ARM v8-A arch. Later SOCs from Apple had multiple performance cores and multiple efficiency cores on the same chip (for ex, A12X Bionic SOC from Apple has four high-performance cores and four high-efficiency cores).

More details on various ARM v8-A cores: https://en.wikipedia.org/wiki/Comparison_of_ARMv8-A_cores

More info on Apple processors here: https://en.wikipedia.org/wiki/Apple-designed_processors

A profile supports both ARM (A64, A32) and THUMB (T32) inst set.

2. Real Time profile       (R): Cortex R4-R8 series used for real time app in embedded systems. HAS FPU for high perf. These support protected memory system arch (PMSA) based on memory protection unit (MPU). 

It supports both ARM (A32) and THUMB (T32) inst set.

3. MicroController profile (M): Cortex M0-M3 series used for embedded microcontrollers (instead of 8051). M3 was the very first cortex core (2004), followed by M1, M0 and then M0+ (2012). There are other less commonly used variants as M4, , M7, M23, etc. M profile supports only Thumbs ISA (no support for ARM ISA). It supports 2 variants of T32 ISA: Thumbs1 and Thumbs2. Thumbs2 being a superset of Thumbs1 is what is supported by almost all M profile cores, so Thunmb1 is more or less obsolete.
Cortex M0/M1: supports subset of THMUBS2 (T32) inst set.
Cortex M3: supports more complete set of THMUBS2 (T32) inst set. more inst supported here (mostly 32 bit equiv for 16 bit inst), as it's more powerful

So, T32 ISA is the most widely used (as it's used in M profile), so we'll concentrate on this. A32 and A64 are more complex ISA with lot more instructions. NOTE: when we say that a cortex core supports T32, A32 or A64 ISA, it supports only a subset of such ISA (not every instruction in that ISA). We need to look in the reference manual for that processor, to know exactly what inst it supports.

ARM architecture:

Besides the 3 profiles and different ISA, ARM defines diff versions of arch. These arch are still evolving. Few ARM arch are: ARMv4T, ARMv5E, ARMv6, ARMv6-M, ARMv7-A, ARMv7-R, ARMv7-M, and ARMv8-A processor architectures => architecture get complex, but faster (with pipelining) as we go from v4T to v8. Arch v4T thru v6 were used in classic ARM cores, and so not relevant for cortex family. Subscript A,R,M after the version num, indicates in which profiles that arch is used. Starting from version v7, arch were defined for each profile. These arch capture the ISA and profile info, so each cortex processor is tied to one of these arch:

ARMv6-M = For M profile. implemented in Cortex M0/M0+/M1. Simplest arch. These are the only cortex cores that are based on v6. All other cortex cores based on v7/v8 arch.

ARMv7-M = For M profile. implemented in Cortex M3

ARM v7-R = For R profile. implemented in Cortex R4 thru R8

ARM v7-A = For A profile. implemented in Cortex A8 thru A17 which were all 32 bit

ARM v8-A = For A profile. implemented in Cortex A32, and A53 thru A77 which were all 64 bit (except A32 which was 32 bit, but still has v8 arch). Most comlex arch. More minor revisions of these as v8.1, etc released. This competes with most advanced processors developed by Intel/AMD.

So, M profile uses v6, v7. R profile uses v7, while A profile uses v7,v8.

General ARM arch: All reg in ARM arch are 32 bit, irrespective of ISA. ARM arch is RISC. It has uniform Register File, and register load/store.

13 general purpose registers - R0 to R12

R0 to R7 are LO reg, and can be accessed by all 16 bit Thumb inst and all 32 bit Thumbs2 inst.

R8 to R12 are HI reg and can be accessed by all 32 bit Thumbs2 inst, but not by all 16 bit Thumbs inst.

3 special meaning register -R13, R14, R15

R13  = can be MSP=Main stack pointer or PSP=Process stack pointer, only one of these 2 reg can be accessed at any time. Usually we would expect only 1 SP, but having 2 SP allows 2 separate stack memories to be setup. MSP is the default SP and can be used by any code that requires privileged access, while PSP is used by unprivileged code. So, MSP is used by OS kernel as well as exception handlers, while PSP is used by user application code. Since PUSH and POP operations are always word aligned (i.e addr = 0x0, 0x4, 0x8, etc), SP has it's lowest 2 bits tied to 00.Having 2 SP, prevents stack error in user application (thread mode) from corrupting stack used by OS (handler mode)

R14  = LR=Link reg. Used to store return pgm counter when a subroutine/function is called. Even though PC bit 0 is always 0, LR bit 0 is readable/writable and is therfore not guaranteed to be 0. This LSB bit set to 0 indicates ARM state, while 1 means Thumbs state.

R15  = PC=pgm counter. bit 0 of PC is always 0, as inst addr are half-word aligned. However, in branching, either by writing to PC or using branch inst, LSB of target addr is always set to 1 to indicate Thumb state operation. Setting to 0 will cause it to switch to ARM state, which may not be supported causing fault exception. NOTE: even though LSB is written as 1, branch takes place with LSB=0, as LSB bit is tied to 0, and can't be changed.

4. few special purpose reg: These reg can only be accessed via MRS and MSR inst. These reg are not mapped to mem, are just like R0-R15 reg.

PSR = pgm status reg. Divided into 3 = APSR (application psr), IPSR (intr psr), EPSR (execution psr)

Interrupt mask reg = PRIMASK, FAULTMASK, BASEPRI, etc

Control reg = CONTROL. Bit 1 of this reg control which SP is used for thread mode. If it's 1, PSP is used in thread mode, while if 0, MSP is used for both thread and handler mode.

memory map: Since addr is 32 bits for T32/A32, addr from 0x0000_0000 to 0xFFFF_FFFF can be accessed, resulting in 4GB of mem. These are divided into several segement. Each segment has particular attributes like can be written, can be cached, etc.

1. 0x0000_0000 to 0x1FFF_FFFF (code segment) => Bottom 0.5GB is for pgm code. This is where we have flash mem or ROM to store our whole pgm

2. 0x2000_0000 to 0x3FFF_FFFF (on chip sram segment) => Next 0.5GB is for pgm data. This is where we have sram or volatile mem to rd/wrt our data (as stack, var, etc)

3. 0x4000_0000 to 0x5FFF_FFFF (on chip peripheral segment) => Next 0.5GB is for peripheral devices. This is where all AHB/APB reg for all peripheral devices are stored

4. 0x6000_0000 to 0x9FFF_FFFF (off chip sram segment) => Next 1.0GB is for external volatile mem. Mem regions 1,2 and 4 above are the only ones from where code execution is allowed

5. 0xA000_0000 to 0xDFFF_FFFF (off chip peripheral segment) => Next 1.0GB is for external peripheral devices

6. 0xE000_0000 to 0xFFFF_FFFF (system segment) => Last 0.5GB is for mem mapped reg. This contains all system reg (i.e IPR, SCR, CPUID, etc), ROM tables, and some vendor specific area. Except for small part of this space, most of this mem space transactions don't appear as rd/wrt on AHB bus, as all these reg are in NVIC which is internal to processor. The processor supports only word size accesses in the range 0xE0000000 - 0xEFFFFFFF.

The processor contains a bus matrix that arbitrates the processor core and optional Debug Access Port (DAP) memory accesses to both the external memory system and to the internal NVIC and debug components. Transactions are routed as follows:
1. All accesses below 0xE0000000 or above 0xF0000000 appear as AHB-Lite transactions on the AHB-Lite master port of the processor.
2. Accesses in the range 0xE0000000 to 0xEFFFFFFF are handled within the processor and do not appear on the AHB-Lite master port of the processor.

NVIC: Nested Vectored Interrupt controller: NVIC provides nested intr support, i.e intr can be programmed to different priority levels, and depending on priority levels, new intr can override current running intr. Whenener the processor gets an intr, it jumps to appr intr handler and executes that code. The addr of intr handler is stored in vector table.

Very bottom code segment of mem has this vector table. Addr 0x0000_0000 has initial value of MSP. From Addr 0x0000_0004 onwards, we store jump addr for exception #1 to exception number #255. Addr 0x0000_0004 stores jump addr for reset exception, Addr 0x0000_0008 stores jump addr for NMI (non maskable interrupt) exception and so on. Upto exception #15 aresystem intr generated due to some system error. Exception #16 onwards are external intr which are activated when external intr line is pulled active by an external device. There may be anywhere from 32 external intr line to 255 external intr line. Depending on which one is activated, the code jumps to that addr in vector table, which has the addr of that exception stored at that entry.

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MicroProcessor vs Microcontroller:

Companies like Intel, AMD make microprocessors, while ARM, TI, etc make microcontrollers. Core component of both of these is processor core. It's the unit that runs instructions and performs computations. A processor core by itself is not very helpful, as it needs a memory from which to fetch instructions, memory to write results, as well as connections to other peripherals.

A microprocessor is advanced processor core with bare minimum connections to it, to make it functional. It will usually have a memory connection (DDR2, DDR3, etc), and a high speed communication channel (i.e PCIE, HyperTransport, etc), which allows it to be connected to any peripheral, that supports that communication protocol. Thus, a microprocessor is not a complete system by itself, but needs memory and other peripheral connections in order to operate. It is fabricated as a chip, and sold to be used in bigger systems.

A microcontroller on the other hand contains simple processor core, along with memory and peripheral bus where all peripherals can be connected. Thus it is a complete system by itself. It is fabricated as a chip, and depending on what peripherals it has, it can be used for that specific purpose.

Processor Types:

In digital hardware design, processors are the backbone. They are present in most of the digital chips, as embedded processors. They are also sold as standalone chips.

Since most of the digital designs involve involve some form of micro-controller or micro-processor,  we will start with these CPU cores. These CPU cores run on their own instruction set (ISA) which tell the CPU core what to do next. Big companies designing CPU cores have their own proprietery ISA. Intel/AMD have x86 ISA, ARM has Thumbs/ARM ISA, TI has MSP430 ISA and so on. We can't use these ISA in our CPU designs freely without violating some patent. However, there are still source implementation of CPU cores around these ISA. Looks like open source implementation of these ISA have GPL/BSD license, so should be safe to use. To See all such open source processors, check this link: http://parallel.princeton.edu/openpiton/open_source_processors.php.

Fortunately, there is open source ISA available that you are free to use in your designs. It isn't designed from any of these proprietary ISA, and hence is going to be free for ever. It's the RISC-V ISA, co-designed by famous David Patterson (author of Computer Architecture book that is used worldwide in graduate computer architecture courses). More info here: https://en.wikipedia.org/wiki/RISC-V

Website for RISC-V is here: https://riscv.org/

Many cores have been implemented using this ISA. You can download source code for Cores, SOC or even buy the processors which are built using this ISA. Link to download here: https://github.com/riscv/riscv-cores-list

Outside of processors, if you want to get code for other cores or IP such as DSP cores, Filter, USB, Bus, etc, you can download such code written in verilog, vhdl, SystemVerilog here: https://opencores.org/

So, there is really no need to write any piece of code from scratch, unless for learning purpose.

As explained above, processors can be open source, or they can be proprietery processors. Most popular processors are:

1. x86 based processors: These are Intel and AMD processors. They are based off Intel's old x86 design. Only AMD and one other company has patent/licensing rights to make x86 chips.

2. ARM based processors: These are processors based off ARM architecture. ARM is a british company, and it used to sell processor design to other companies, which wanted to embed a processor in their own chip. These processors were small and used very little power, so were most suitable for embedded designs. Intel's x86 processors were meant for higher end usage as in desktops, laptops etc where performance was more important than power.

3. Open source designs: Apart from above mentioned proprietery designs, many open source design for processors have crept up. Especially in the last 10 years, there has been a tremendous push to have open source processor, so that anyone can design processors free of royalty or licensing fees. The biggest hurdle to open source processors was something that could be adopted by masses and be scalable for future. RISC-V is the the one gaining most momentum right now.


 

 

Bus Architectures:

This section lists the most popular bus architectures in existence today. All chips use some form of bus protocol to communicate between different blocks on the same chip, or to talk to other chips. Bus are simple physical wires that connect one chip to the other. So, the first question we might have is why are there so many different kinds of buses when ultimately they all just transfer signals over the same kind of physical wires. Won't they all perform more or less the same, and achieve the same result. That's true. For the physical part, wires don't change their physical transmission capabilities based on bus protocol. The difference in performance between these different buses come mainly due to the software part: how the bus protocol is designed, how much of the work is being in software vs hardware, how scalable the protocol is, etc.

This is how a new bus architecture gets introduced. There is a bus architecture that's proposed by a company or a group of companies. If it gains enough traction, it' starts getting implemented in devices.This is how all basic buses work. When we connect 1 device to another, data xfer takes place between them. It's based on a protocol, that defines how the receiver and the sender transport data and interprets them. For ex, when we connect HDMI cable on back of HD TV to a DVD player, the DVD player and the TV talk using this HDMI protocol on that cable. That protocol defines exactly the cmds and data sequence to be followed. Many of these standards are from old times, and doesn't have any patents or owner. However, many of the recent protocols are properitery, and if you want to use them in your chip, you have to pay a royalty to the owner. You can also have your own protocol, since what is needed is basically a clock line and a data line, and you can have the simplest protocol, and have the bus be called based on your "name". Note that all these bus protocols refer to digital buses, as we use the buses to xfer 0's and 1's.

We'll look at the brief history of various bus protocols:

1st generation bus: These were simple buses as MCA, ISA, EISA, VESA bus.

2nd generation bus: These were more complicated buses, but had more functionality and achieved better speeds. These buses include PCi, AGP, PCI-X, etc.

3rd generation bus: These were radically changed design to take advantage of improvements in physical wire transmission capabilities, and could achieve clock speeds in GHz.  PCI Express, HDMI etc fall in this bucket.

Serial Vs Parallel Bus Architectures:

Parallel bus architecture: In the early days, we had parallel bus architecture, and that is what 1st and 2nd generation buses used. Parallel bus architecture is one where different bits of a bus are transmitted in parallel. They are all transmitted on a clock edge, and then received on next clock edge. This architecture made sense as more the bits you transfer in parallel, higher your throughput would be. This worked for clock speeds up to 500MHz or so.

However, in early 2000, there were significant advances in bus technology wrt phyical layout, transistor design, etc which allowed for much higher speeds ( > 1GHz). Parallel bus architecture wasn't suited for these very high speeds. Multiple reasons for this:

  1. Cross talk between adjacent parallel data lines: Data signal travelling over one data line corrupts data in adjacent line. This is OK for low speeds, but at high speeds, capacitance behaves like a short circuit, so signal on one line basically starts traveling on adjacent line too. One solution is to space out parallel lines, but that takes more area, and hence higher cost.
  2. Skew between various bits: As number of bits in bus increased, there were more lines in parallel. They all need to remain within a certain skew, i.e one bit of a bus can't arrive much earlier or much later than all the other bits of the bus. They all have to arrive at the same time, in order to achieve high speed. If they arrive skewed with each other, then clock speed has to be reduced by the skew amount to allow all bits of the parallel bus to be captured correctly. This put a limit on the number of bits of a bus that can be sent out in parallel.
  3. ElectroMagnetic interference (EMI): This is unwanted interference when high frequency signals are transmitted. These radiate energy, and can couple to other signals and distort their waveform. One way to prevent EMI from disturbing your signal is to shield your signal in cyclinderical wire  shield. However, doing it for all wires of the buses becomes expensive.

Serial Bus architecture: Serial bus architecture got rid of all these issues. However, it required a much higher clock speed to maintain same throughput as parallel bus architecture. In fact, if we had 16 bit parallel bus running at 500MHz in parallel bus, then for serial bus, we needed 16*500=8GHz clock speed to maintain same throughput. This is very speed clk, but now there is no issue of cross talk or skew as there were no adjacent lines in parallel bus. EMI is still there, but can be mitigated by shielding wire (as there is only 1 wire, it's much simpler now).

SERDES in serial bus architecture: Internally on chip, data is transferred in parallel, but just before it comes to pads of the chip, it's converted to serial data. It's transferred as serial 1 wire data on the motherboard, and goes to the pads of the other chip as serial data. Right after the data enters the pads of other chip, it's again converted to parallel data. Why do we do this conversion? i.e why not just transfer data serially all the way. The reason is that parallel data is still faster and requires much lower clock speed. Most of the problem that we had with parallel data transfer was on motherboard, where it's harder to manage crosstalk and skew. This logic on transmitting side chip, that converts parallel data into serial data, is called serializer (or SER). Similarly, This logic on receiving side chip, that converts serial data into parallel data, is called deserializer (or DES). Both of these components combined are called SERDES (serializer deserializer). You will hear this term a lot with all serial bus arch.  Most of the modern bus architectures are all serial bus architectures, and are also called SERDES arch. There are also Equalizer circuit on both TX and RX just before the chip pins connect to the cable/channel. These Equalizers are needed since cable starts attenuating the signals at low freq, but we need to transmit signals at much higher freq. Equalizers on TX side boost the signal Bandwidth, so that even after attenuation. the signal maintains it's signal levels at hugher freq, which can then be recovered by the RX equalizer.

A full diagram of SERDES logic is shown below. FIXME attach picture belo:

 

There's a very good video lecture on youtube: (by "analog layout and design")

https://www.youtube.com/watch?v=FGzQV4a9KAw

 

PIPE (Phy Interface for PCI Express and USB SuperSpeed Architecture):

There are many SERDES bus architecture is use such as USB, DDR, PCIe, etc. They all have same kind of design: an analog phy that has the TX/RX, a digital controller that communicates with the analog Phy, and then software and device drivers that interact with the digital controller.

PIPE: Comes PIPE, which is a spec developed for Phy interface. This is to enable development of a phy as a discrete IC or as a macrocell for inlcusion in ASIC designs. It defines a standard interface between such a PHY and a Media Access Layer (MAC) & Link Layer ASIC. One of the motivations behind Phy and digital i/f is that Peripheral and IP vendors will be able to develop and validate their designs, insulated from the high-speed and analog circuitry issues associated with the PCI Express or USB SuperSpeed PHY interfaces, thus minimizing the time and risk of their development cycles.Though PIPE refers to PCIE Express in it's name, it's applicable to USB too. Below is the pic of a PIPE i/f.

 

 

Common Bus Architecture and Protocols:
 

There are many serial nThese are some of the common Bus Standards in use today:

SPI and I2C are not only the 2 oldest bus standards, but also the simplest. They are still widely used today amongst 2 chips to transfer data betweenthem.

SPI: This is a 4 wire bus protocol. Very simple design. Widely used as simple communication interface between 2 chips.

I2C: This is a 2 wire interface. It's slightly complicated, but advantage is that it only uses 2 pins, so reduces overall area and cost.

USB: Uiversal Serial Bus. Most common bus interface that you see in all devices.

PCI: Peripheral Component Interconnect Bus. Another very popular bus format

HDMI: Mainly used to transfer audio/video signals from one electronic device to another for display purposes.

 MIPI:

DDR:

 

CentOS:

This is the second best OS after Linux Mint (for a newbie to Linux). It's interface is clean, and is a no frills OS. It's supported by RedHat, so it has same level of stability for OS that is expected of any large company. Best part is that it has lots of help available online. CentOS is my first choice of any Linux OS, It's screen doesn't look similar to windows, but otherwise it's very simple to use even for a person new to Linux. it's up on my laptop 24/7 for more than a year with no crashes !!

Versions:

There are many versions of CentOS Linux, as CentOS-6, CentOS-7 and CentOS-8 (as of Oct, 2021). CentOS 7 is very widely used, so I would advise to stick with CentOS 7. CentOS 8 is not going to be supported for long, so don't bother with CentOS 8. CentOs-8 is going to be followed by CentOS Stream, which is a new direction for CentOS. Until now, CentOS Linux were a rebuild of RHEL (Red Hat enterprise Linux), and so were called "downstream release" of RHEL. Starting with CentOS stream, it's going to be the other way round, where RHEL is going to be a downstream build of CentOS stream. So, your CentOS stream for laptop will be available with all latest/greatest features of RHEL, even before enterprise consumers see it.

However, for our purpose, CentOS 7 is going to suffiice for next 5 years without any issues, so we'll talk about stream in 2026.

Installating OS:

Download, install using these links:

https://www.tecmint.com/centos-7-installation/33333

steps:

1. Download CentOS ISO:

https://www.centos.org/download/

Download x86-64 bit as that's what almost all laptops using Intel/AMD chips are going to need.

2. Copy ISO files to USB drive:

You need linux already installed in order to cp the iso to usb from within linux. We don't use UUI to burn the iso as explained previously (it doesn't work anyway), so "cp" is the only way to get CentOS installed. So, in order to get CentOS installed, you need an already installed linux distro on some other laptop. Use cp cmd as explained under installation.

1A. Use cp cmd to copy to usb drive

sudo cp /home/aarav/Downloads/CentOS-7-x86_64-Everything-1804.iso /dev/sdb => Do not use /dev/sdb1. See in "Linux Installation section for details"

1B. Do NOT use dd to copy.

Follow instructions from above for running dd. run "lsblk" to get device name for usb. Run dd.

sudo dd if=/home/aarav/Downloads/CentOS-7-x86_64-Everything-1804.iso of=/dev/sdb status=progress oflag=sync

3. Reboot Windows:

Once copied, plug it in windows laptop and reboot it. Do not use UUI, as it gives error. You will be greeted with "Install centos-7" screen. Follow prompts as explained in link above from tecmint.

Once CentOS is installed, you have to reboot your computer once again. Now you will be greeted with "GRUB" bootloaded which will ask you to choose the OS you want to login with. One issue that I've seen with CentOS is that the grub boot menu may not have "windows boot" option in it at all. To fix this, do this:

  1. log into centos linux, open a terminal and type these 2 cmds: ( https://bytefreaks.net/gnulinux/ntfs-support-on-centos-7 )
  2. sudo yum --enablerepo=extras install epel-release
  3. sudo yum install ntfs-3g -y
  4. https://unix.stackexchange.com/questions/169787/windows-boot-option-is-missing-after-installing-centos-7-how-can-i-get-it-back .
    1.  type this cmd: sudo grub2-mkconfig > /dev/null => This will show windows 10 loader on /dev/sda1. Now run below 2 cmds:
      • sudo cp /boot/grub2/grub.cfg /boot/grub2/grub.cfg.old
      • sudo grub2-mkconfig -o /boot/grub2/grub.cfg
  5. This will allow us to boot into windows

Few more helpful links:

https://wiki.centos.org/HowTos/InstallFromUSBkey

https://www.centos.org/forums/viewtopic.php?t=56144 => This not relevant as it's for UUI

 

Install desktop environment (DE):

Read about DE on "linux installation" to get some background. Here's a way to install different DE on CentOS. You may not need to do any of this if you are already satisfied with the default DE that is installed on your CentOS version.

sudo yum grouplist => lists all groups. It lists various DE as Cinnamon Desktop, MATE Desktop, Xfce, KDE Plasma Workspaces, GNOME Desktop, etc

sudo yum groupinfo "Cinnamon Desktop" => provides more info about this DE pkg. Do this for any pkg before installing it to make sure you installing what you think you want to install.

sudo yum groupinstall "Cinnamon Desktop" => this is cinnamon de used in Linux Mint.

sudo yum groupinstall "MATE Desktop" => this is continuation of GNOME2, which was much more liked. This is the default on CentOS 6.

sudo yum groupinstall "GNOME desktop" => This is GNOME3 DE, which is a big departure from GNOME2 and not liked by everyone. However, it's the default on CentOS 7. gnome classic and gnome shell are the 2 gnome de available here.

sudo yum groupinstall "KDE Plasma Workspaces" => This is the old conventional KDE desktop

sudo yum groupinstall Xfce => This is Xfce desktop. very light weight.

To remove a DE, we can do:

sudo yum groupremove "MATE Desktop" => uninstalls and removes all MATE DE related files.

 

Installing other software:

Here are links for few more pgms to install. Firefox and Skype are the important ones. Luckily they install flawlessly.

Install Firefox browser:

Firefox is installed by default. If not installed, type these cmds on Terminal.

firefox -version => shows version of firefox installed. If it's not installed or not latest one, run below cmds

sudo yum install firefox => installs firefox when nothing was installed.

sudo yum update firefox => This updates firefox to latest version if it was already installed.

firefox -version => Now check if it shows the latest version.

Install Skype:

Installing skype is very easy on CentOS. Type the 2 below cmds on terminal.

wget https://repo.skype.com/latest/skypeforlinux-64.rpm

sudo yum localinstall skypeforlinux-64.rpm

Now launch skype on clicking on Skype icon, or type "skypeforlinux" on terminal.

 

Issues and Solutions:

Sometimes some of the graphic applets will crash and not appear any more when you restart your system. As an example, the battery charge indicator icon (on the top right corner) may disappear. You just have to restart that applet, by finding out the exact name of the applet.

Network Manager applet crash: If your network manager applet (the one that shows the internet connection with bars) disappears, these are the steps to restore it. On the terminal, type the below cmds:

  • $ which nm-applet => returns something like this: /usr/bin/nm-applet
  • $ nm-applet => now run the applet. Doesn't show any o/p.
  • $ service NetworkManager restart => Now restart nm. It shows msg as below:
    • Redirecting to /bin/systemctl restart NetworkManager.service

This will restore the network manager applet back.

 

Property taxes in USA:

In most of the countries when you buy or own a home for your living, there's no tax that you pay to the government for owning in a house. However, in USA, you have to pay a property tax to local authorities for owning a home. If you live in a rental house, then the owner of that house pays the property tax. One noteworthy point is that  you have to pay property tax to the local authorities based on the market value of the house (that's true for most of the states. One notable exception is California, where taxes are charged on the purchase price of the house, and remain fixed as long as that property is not sold). Property taxes vary a lot from state to state, from city to city, and even within a city. On avg, it ranges from 1% to 3%.

Tax breaks for homeowners:

1. Homestead exemption: However one respite that homeowners get is that they get "Homestead exemption" which basically reduces the taxable amount of the property, thus reducing the taxes paid. However, this "Homestead exemption" is only available if you use that house as your primary residence for that calender year.

2. Federal tax benefit: Other tax break you get is from Uncle Sam. when you file your taxes with IRS. You can reduce your taxable income by deducting the amount of property taxes and interest paid on the house that you used as your primary residence. However, this deduction is only available if you itemize your deductions (i.e you don't claim standard deduction which is about $12K for year 2012). So, only if your mortgage interest and property taxes are over $12K, you see any benefit from it at all. It turns out that with interest rates of 2.5% and property tax of 2.5%, your house has to be over $250K, before you see even the first cent of any federal tax break. So, it's of no use for most of the people, who buy reasonably priced houses, within their means.

UPDATE 2019: Starting 2019, there are lot of changes in tax laws. Standard deduction is $24K, and amount of property tax that you can deduct is limited to $10K. Also, house prices have started going over $0.5M in most employable cities. However, the fact still remains, that most homeowners will still see very small tax benefit for owning a home, even more so with 2019 tax changes.

UPDATE 2022: Starting 2022, home prices are breaking all records, and now a whopping 10% of houses in USA are over $1M+. If you look at employable cities, and houses within reasonable commute distance, most of these houses are over $1M+. Most likely if you have a decent job (top 10% of income earners), your house has already breached $1M mark. In such cases, it may be worthwhile to look into itemizing tax deduction (as property tax of $10K+interest of $20K), will easily surpass std deduction of $24K.

Tax rates:

When you search for property tax rates for different states, you will find websites giving you a range of tax rates for different states. However, these rates are meaningless, as the rates vary a lot within the same state and same city. Before you purchase a house, find out the tax rates from neighbors, or ask them from where you can get the tax rates. More than likely, you can goto county website to get this info. OR just look up the address of the property you are interested in, and search for it's "property tax statement". These statements are public information and usually put on the "County property tax website". Sometimes they may not have all the taxes listed, as some taxes may be charged by some other government agency. USually it's complete, but be cautious andverify with current owner or nearby residents.

 

I'll talk specifically about Texas, as I'm in Texas. In Texas, for any given city, these are the taxes charged:

School district tax: A major portion of property tax goes into Public schools to fund them. So, as expected, School district tax are the biggest component of property tax. It's usually 1% or more of the value of your property. All schools that you see around you where 90% of the American kids go are public schools. Most of America attends public school, as the education is at par with private school, and you don't miss anything. There are few private schools in every city. However, private schools cost a lot of money, while public schools are free. Public schools are funded by tax dollars. Funding these public schools is the responsibility of state government, so each state government levies some kind of tax to fund these schools. Many states choose to use part of state income tax to fund these schools. States which don't have state income tax, instead use property tax to fund these schools. School district tax is part of that property tax that goes into funding schools (usually levied in states which don' have state income taxes)

Within a city, there can be several Independent School District (known as ISD). Each ISD is governed independently and can charge whatever tax it seems appropriate based on the funding it needs. Usually good ISD charge higher tax (since they maintain high quality of education through higher funding). Also, property prices are most directly influenced by rating of ISD. For top ISD, property prices are atleast 10%-20% higher than those with mediocre ISD. So, you get penalized twice with high rated ISD - one as higher property tax rate, and other as higher property price. The reason, why ISD are so important is because each house in USA is assigned a ISD. A kid with that particular home address can only attend the assigned school in that iSD. Though it's possible to send your kid to a different school, if you don't like that particular school, but it's not easy, and you have to justify it with concrete facts (not just because the school is low rated). Also, other important thing to note is that even though the particular ISD may be highly rated, but the particular school (elementary, middle and high school) that your kid will be going to, may still be pretty low rated. So, make sure that your particular schools are rated OK (rating of 8 or greater out of 10). If you are going to send your kid to private school, then ISD  or public schools should not matter for you. ISD are usually named after the name of the city.

County tax: County is similar to a district of India, where a city and its suburbs belong to one county. County tax rate is the same for every house in that county. Usually county tax is small at about 0.25% of the property value.

City tax: Each city charges it's own tax. City tax are the 2nd biggest component of property taxes after the school district taxes. City taxes vary widely from 1 city to other, but usually they are in the range of 0.5% to 1%. Most of the times, if you live in a big city, and your home address has the name of that city, you will be charged the city tax for that city. Sometimes, even though your address may indicate a particular city, your home still may not be part of that city from tax perspective. It might still be considered part of some suburb of that city depending on how the zoning and addr assignment was done. So, your city tax rate might be the suburb city tax rate. For ex, I might live in dallas city (and have a dallas addr), but might still get city tax charged by suburb of dallas, i.e plano city tax instead of dallas city tax. Usually newer cities have higher city tax rate than older established cities.

NOTE: even though your city tax may be from city A, your ISD may belong to city B. In such case, you get 2 tax statements, one from your city and one from your ISD (which might be in another city). There's no guarantee that ISD that your house is assigned to will be in the same city as your house. The reason for this is that population growth may be uneven across different areas, which may make some ISD overwhelmed, while some other may have lots of vacant slots. So, ISD reassign home addr amongst themselves to make sure no one is running out of space. ISDs for homes may change too in future.

Other thing to note is that sometimes there may be no city tax at all even though your addr may indicate a city name. This happens when that area is in the suburbs of city, and city doesn't provide services to that part of town (i.e not providing water lines, sewage lines, fire services, etc). In such cases, city doesn't charge a city tax. I've seen this happen to a lot of areas around Austin city. This may change in the future though, as city tries to being more and more areas under it's tax jurisdiction (as it's free money for the city).

College tax: There are lot of community colleges in cities, which are funded partially by College tax. This college tax is levied by the county, and is the same for a given county, so sometimes these are lumped together with county tax. This tax may not be present for all counties or cities. This tax is usually small at 0.1% or less.

Hospital tax: Many counties have Hospital tax too. These are the same for a given county, so sometimes they are lumped together with county tax. Again, this tax may not be present for all counties or cities. This tax is usually small at 0.1% or less.

MUD tax: Sometimes, a neighborhood is not part of any city for tax purpose. Some of these neighborhood form MUD (Municipal Utility District) which provide water/waste water services (since city may not provide these services for whatever reasons). MUD basically raises bond money for setting up water/waste-water infrastructure, so that the neighborhood gets these municipal services. The MUD is setup as non-profit only for that neighborhood, and taxes properties at a very high rate (sometimes as high as 1%). This MUD tax is supposed to go down over time (as the bpond is paid off), but very rarely happens so. Remember that you still have to pay water and waster bills every month for water that you use, just like you would pay anywhere the city provides these facilities. To top it off, these water/waste-water bills are also lot higher. These MUD are very common in Texas, so be very careful before you purchase a property with MUD taxes (MUD taxes are a poison). Some newer properties do away with MUD completely by setting up private septic system for waste-water drainage, which is lot cheaper. They get water from some water utility, not sure how? FIXME

Other taxes: there might be myriad of misc taxes on top of all other taxes. However, these other taxes are usually small. Biggest taxes are school, city and county taxes, as explained above, accounting for 80% of the property taxes.

 


 

Sample Taxes for cities around State of Texas:

Below are taxes that I pulled from my tax statements for various cities. These will give you an idea of how much property tax to pay when you buy a house in Texas. Usually you will pay anywhere from 2% to 4% of the current value of the property as property tax. Since many houses in Texas are approaching $1M mark as of 2022, be prepared to pay $15K-$30K just in property taxes every year. They are based on current price, so if prices keep appreciating, you will keep on paying more and more.

As of 2020, cities and counties have started reducing their tax rates by the same amount that houses appreciate by, so that your tax bill remains the same. As of 2024, tax rates for most of the houses in Texas is close to 2%, rather than 3%.

In Travis county (in the state of Texas), below is a sample of diff tax rates charged. As you can see, it varies a lot amongst counties, cities, ISD, etc. Link => https://www.realestateinaustin.com/buyers/travis-county-property-tax-rates-category/

1. Dallas, TX (in city): property tax rate breakdown (for year 2012):

School tax: 1.29% (for Dallas ISD)

City tax: 0.8% (For house in dallas city only, other cties in suburbs have different rates)

Dallas County tax: 0.25%

Hospital tax: 0.27%

College tax: 0.1% (for DCCC = dallas county community college)

So, total property tax for Dallas, TX  is: 1.29 + 0.8 + 0.25 + 0.27 + 0.1 = 2.71%

However, as an homeowner you get "Homestead exemption". So, with homestead exemption, these are the rates (NOTE: I show lower rates with homestead exemption. In reality, rates remain the same, your taxable value goes down by 20%, resulting in lower effective rate):

School tax: 1.16% (for Dallas ISD there's 10% discount). Also, Dallas ISD lowers your taxable property value by $15K, on top of this 10% discount.

City tax: 0.64% (For dallas city, there's 20% discount)

Dallas County tax: 0.20% (For dallas county, there's 20% discount)

Hospital tax: 0.22% (20% discount)

College tax: 0.08% (20% discount)

So, total property tax for Dallas, TX with homestead exemption is: 1.16 + 0.64 + 0.2 + 0.22 + 0.08 = 2.3%. On top of this, you also get $15K knocked off from your property price for School tax, so that further lowers your tax rate a little (for a house of $250K, that implies reduction of 0.07%, so effective tax rate = 2.23%).

2. Austin, TX (in City): property tax rate breakdown (for year 2019):

School tax: 1.19% (for Austin ISD)

City tax: 0.44% (For house in Austin city only, other cties in suburbs have different rates)

Travis County tax: 0.35% (austin is in Travis county)

Travis Central Health tax (aka Hospital tax): 0.1%

Austin Community college tax (aka College tax): 0.1% (for ACC = Austin community college)

So, total property tax for Austin, TX  is: 1.19 + 0.44 + 0.35 + 0.1 + 0.1 = 2.19%

However, as an homeowner you get "Homestead exemption". For travis county, homestead exemption lowers the taxable value of property resulting in effective lower rates. So, with homestead exemption, these are the rates:

School tax: 1.19% (for Austin ISD there's $25K exemption on property price, no reduction on tax rate).

City tax: 0.39% (For Austin city, there's 10% discount)

Travis County tax: 0.28% (For Travis county, there's 20% discount)

Hospital tax: 0.08% (20% discount)

College tax: 0.10% (For ACC, there's $5K exemption on property price, no reduction on tax rate)

So, total property tax for Austin, TX with homestead exemption is: 1.19 + 0.39 + 0.28 + 0.08 + 0.10 = 2.04%. On top of this, you also get $25K knocked off from your property price for School tax, so that further lowers your tax rate a little (for a house of $500K, that implies reduction of 0.06%, so effective tax rate = 1.98%).

3. Austin, TX (outside city): property tax rate breakdown (for year 2019): This is for a property having an address in Austin but not considered in city limits for tax purpose. So, there is no city tax, but MUD tax. This address is in Eanes ISD (NOT Austin ISD), so School tax is for Eanes ISD (Eanes ISd is top rated ISD in Austin)

School tax: 1.2% (for Eanes ISD)

City tax: 0% (For this house, there is no city tax even though address is in Austin)

Travis County tax: 0.35% (austin is in Travis county)

Travis Central Health tax (aka Hospital tax): 0.1%

Travis County ESD #10 tax: 0.1% (this is for addresses that are not considered part of City of Austin)

Austin Community college tax (aka College tax): 0% (No ACC tax as address is not considered part of Austin)

MUD tax: 0.6% (This MUD tax is just because that particular community developer formed a MUD. Some developers put their own septic system, and thus never have MUD taxes)

So, total property tax for this property in Austin, TX  is: 1.20 + 0.35 + 0.1 + 0.1 + 0.6 = 2.35% (so absence of city tax was more or less compensated by MUD tax). You can find many houses in Eanes ISD, which do not have MUD taxes, so their property taxes are closer to 1.75%. Some MUD taxes also also lower, like 0.3% or so. Again, you get homestead exemption, which may lower your rates further.