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Published: Wednesday, 01 April 2020 22:48

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Cortex M3 is the first cortex family processor. It supports T32 ISA.

Cortex M3 has 2 operation modes: thread mode (when running a normal pgm) and handler mode (when running an exception handler). It also has 2 privilege levels: privileged state (where it has all privileged rights incl access to all mem range and all reg), and user state (where it has access to limited mem range and reg to prevent user pgm from causing system crash).

When M3 exits from reset, it starts in privileged mode. The pgm then writes a control reg to switch M3 to user state. Once in user state, the pgm there can't write control reg to switch it back to privilege state. Thus it's one way switch from privilege state to user state. The only time when user pgm can enter privilege state, is when it gets an exception and switches to handler mode. Then while the exception code is running, M3 is in privilege state (to allow exceptions to access all mem and all reg as they are trusted pgm, and usually need unrestricted access), and switches back to user state when switching to thread mode.

FIXME => more info